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| Foreword | ||
| Dedication | ||
| Committees | ||
| Additional Reviewers | ||
| Computer Arithmetic - An Algorithm Engineer's Perspective | 2 | |
| High-Performance Left-to-Right Array Multiplier Design | 4 | |
| Multiple-Precision Fixed-Point Vector Multiply-Accumulator Using Shared Segmentation | 12 | |
| Some Optimizations of Hardware Multiplication by Constant Matrices | 20 | |
| A Less Recursive Variant of Karatsuba-Ofman Algorithm for Multiplying Operands of Size a Power of Two | 28 | |
| Revisiting SRT Quotient Digit Selection | 38 | |
| SRT Division Algorithms as Dynamical Systems | 46 | |
| A New Iterative Structure for Hardware Division: the Parallel Paths Algorithm | 54 | |
| Prescaled Integer Division | 63 | |
| Hardware Implementations of Denormalized Numbers | 70 | |
| Representable Correcting Terms for Possibly Underflowing Floating Point Operations | 79 | |
| High Performance Floating-Point Unit with 116 Bit Wide Divider | 87 | |
| The Case for a Redundant Format in Floating Point Arithmetic | 95 | |
| Decimal Floating-Point: Algorism for Computers | 104 | |
| Panel: Revisions to the IEEE 754 Standard for Floating-Point Arithmetic | 112 | |
| "Partially Rounded" Small-Order Approximations for Accurate, Hardware-Oriented, Table-Based Methods | 114 | |
| An Overview of Floating-Point Support and Math Library on the Intel XScale Architecture | 122 | |
| Theorems on Efficient Argument Reductions | 129 | |
| Accelerating Sine and Cosine Evaluation with Compiler Assistance | 137 | |
| Worst Cases and Lattice Reduction | 142 | |
| Isolating Critical Cases for Reciprocals Using Integer Factorization | 148 | |
| Solving Range Constraints for Binary Floating-Point Instructions | 158 | |
| A Parametric Error Analysis of Goldschmidt's Division Algorithm | 165 | |
| A Unidirectional Bit Serial Systolic Architecture for Double-Basis Division over GF(2[superscript m]) | 174 | |
| Efficient Multiplication in GF(p[superscript k]) for Elliptic Curve Cryptography | 181 | |
| Low Complexity Sequential Normal Basis Multipliers over GF(2[superscript m]) | 188 | |
| A Low Complexity and a Low Latency Bit Parallel Systolic Multiplier over GF(2[superscript m]) Using an Optimal Normal Basis of Type II | 196 | |
| High-Radix Iterative Algorithm for Powering Computation | 204 | |
| On-Line Multiplication in Real and Complex Base | 212 | |
| A VLSI Algorithm for Modular Multiplication/Division | 220 | |
| Saturating Counters: Application and Design Alternatives | 228 | |
| Error-Free Arithmetic for Discrete Wavelet Transforms Using Algebraic Integers | 238 | |
| On Computing Addition Related Arithmetic Operations via Controlled Transport of Charge | 245 | |
| The Interval Logarithmic Number System | 253 | |
| Scaling an RNS Number Using the Core Function | 262 | |
| Energy-Delay Estimation Technique for High-Performance Microprocessor VLSI Adders | 272 | |
| Tutorial: Design of Power Efficient VLSI Arithmetic: Speed and Power Trade-offs | 280 | |
| Author Index | 281 |
Overview