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A synergistic approach to signal integrity for high-speed digital design

This book is designed to provide contemporary readers with an understanding of the emerging high-speed signal integrity issues that are creating roadblocks in digital design. Written by the foremost experts on the subject, it leverages concepts and techniques from non-related fields such as applied physics and microwave engineering and applies them to high-speed digital design—creating the optimal combination between theory and practical applications.

Following an introduction to the importance of signal integrity, chapter coverage includes:

  • Electromagnetic fundamentals for signal integrity
  • Transmission line fundamentals
  • Crosstalk
  • Non-ideal conductor models, including surface roughness and frequency-dependent inductance
  • Frequency-dependent properties of dielectrics
  • Differential signaling
  • Mathematical requirements of physical channels
  • S-parameters for digital engineers
  • Non-ideal return paths and via resonance
  • I/O circuits and models
  • Equalization
  • Modeling and budgeting of timing jitter and noise
  • System analysis using response surface modeling

Each chapter includes many figures and numerous examples to help readers relate the concepts to everyday design and concludes with problems for readers to test their understanding of the material. Advanced Signal Integrity for High-Speed Digital Designs is suitable as a textbook for graduate-level courses on signal integrity, for programs taught in industry for professional engineers, and as a reference for the high-speed digital designer.

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Product Details

  • ISBN-13: 9780470192351
  • Publisher: Wiley
  • Publication date: 3/16/2009
  • Edition description: New Edition
  • Edition number: 1
  • Pages: 680
  • Product dimensions: 6.10 (w) x 9.30 (h) x 1.40 (d)

Meet the Author

STEPHEN H. HALL is a Senior Staff Engineer at Intel Corporation, where he leads a team focused on the research of new modeling and measurement solutions for channel speeds as high as 30Gb/sec. Previously at Intel, he was the lead designer for desktop and server buses on Pentium II, III, and IV based systems, coordinated research in the area of high-speed signaling with multiple universities, led research and development teams in the area of high-speed modeling, and taught signal integrity courses to engineers in two countries. He is also the author of High-Speed Digital System Design (Wiley).

HOWARD L. HECK is a Principal Engineer at Intel Corporation, where he leads development of the signaling specifications and solutions for USB 3.0. He also teaches high-speed digital interconnect design at the Oregon Graduate Institute, is a Senior Member of the IEEE, and holds five patents in the area of high-performance packaging and interconnects, with five more pending.

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Table of Contents



Chapter 1: Introduction: The importance of signal integrity.

1.1 Computing Power: Past and Future.

1.2 The problem.

1.3 The Basics.

1.4 A new realm of bus design.

1.5 Scope.

1.6 Summary.

1.7 References.

Chapter 2: Electromagnetic Fundamentals for Signal Integrity.

2.1 Introduction.

2.2 Maxwell’s Equations.

2.3 Common Vector Operators.

2.4 Wave Propagation.

2.5 Electrostatics.

2.6 Magnetostatics.

2.7 Power Flow and the Poynting Vector.

2.8 Reflections of Electromagnetic Waves.

2.9 References.

2.10 Problems.

Chapter 3: Ideal Transmission Line Fundamentals.

3.1 Transmission Line Structures.

3.2 Wave propagation on loss free transmission lines.

3.3 Transmission line properties.

3.4 Transmission line parameters for the loss free case.

3.5 Transmission line reflections.

3.6 Time domain Reflectometry.

3.7 References.

3.8 Problems.

Chapter 4: Crosstalk.

4.1 Mutual Inductance and Capacitance.

4.2 Coupled Wave Equations.

4.3 Coupled Line Analysis.

4.4 Modal Analysis.

4.5 Crosstalk Minimization.

4.6 Summary.

4.7 References.

4.8 Problems.

Chapter 5: Non-ideal conductor models for transmission lines.

5.1 Signals propagating in an unbounded conductive media.

5.2 Classic conductor model for transmission lines.

5.3 Surface Roughness.

5.4 Transmission line parameters with a non-ideal conductor.

5.5 Problems.

Chapter 6: Electrical properties of dielectrics.

6.1 Polarization of dielectrics.

6.2 Classification of dielectric materials.

6.3 Frequency dependent dielectric behavior.

6.4 Properties of a physical dielectric model.

6.5 The fiber-weave effect.

6.6 Environmental variation in dielectric behavior.

6.7 Transmission line parameters for lossy dielectrics and realistic conductors.

6.8 References.

6.9 Problems.

Chapter 7: Differential signaling.

7.1 Removal of common mode noise.

7.2 Differential Crosstalk.

7.3 Virtual reference plane.

7.4 Propagation of Modal Voltages.

7.5 Common terminology.

7.6 Drawbacks of differential signaling.

7.7 References.

7.8 Problems.

Chapter 8: Mathematical Requirements of Physical Channels.

8.1 Frequency domain effects in time domain simulations.

8.2 Requirements for a physical Channel.

8.3 References.

8.4 Problems.

Chapter 9: Network Analysis for Digital Engineers.

9.1 High frequency voltage and current waves.

9.2 Network Theory.

9.3 Properties of Physical S-parameters.

9.4 References.

9.5 Problems.

Chapter 10: Topics in High-Speed Channel Modeling.

10.1 Creating a physical transmission line mode.

10.2 Non-Ideal Return Paths.

10.3 Vias.

10.4 References.

10.5 Problems.

Chapter 11: I/O Circuits and Models.

11.1 Introduction.

11.2 Push-Pull Transmitters.

11.3 CMOS Receivers.

11.4 ESD Protection Circuits.

11.5 On-Chip Termination.

11.6 Bergeron Diagrams.

11.7 Open Drain Transmitters.

11.8 Differential Current Mode Transmitters.

11.9 Low Swing/Differential Receivers.

11.10 IBIS Models.

11.11 Summary.

11.12 References.

11.13 Problems.

Chapter 12: Equalization.

12.1 Introduction.

12.2 Continuous Time Linear Equalizers.

12.3 Discrete Linear Equalizers.

12.4 Decision Feedback Equalization.

12.5 Summary.

12.6 References.

12.7 Problems.

Chapter 13: Modeling and Budgeting of Timing Jitter and Noise.

13.1 The Eye Diagram.

13.2 Bit Error Rate.

13.3 Jitter Sources and Budgets.

13.4 Noise Sources and Budgets.

13.5 Peak Distortion Analysis Methods.

13.6 Summary.

13.7 References.

13.8 Problems.

Chapter 14: System Analysis Using Response Surface Modeling.

14.1 Introduction.

14.2 Case Study: 10 Gb/s differential PCB interface.

14.3 RSM Construction by Least Squares Fitting.

14.4 Measures of Fit.

14.5 Significance Testing.

14.6 Confidence Intervals.

14.7 Sensitivity Analysis and Design Optimization.

14.8 Defect Rate Prediction Using Monte Carlo Simulation.

14.9 Additional RSM Considerations.

14.10 Summary.

14.11 References.

14.12 Problems.

Appendix A: Useful formulae, identities, units and constants.

Appendix B: 4-port Conversions between T and S-parameters.

Appendix C: Critical values of the F-statistic.

Appendix D: Critical values of the t-statistic..

Appendix E: Derivation of the internal inductance using the Hilbert Transform.

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