Algorithms and Parallel VLSI Architectures III

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Overview

A comprehensive overview of the current evolution of research in algorithms, architectures and compilation for parallel systems is provided by this publication.

The contributions focus specifically on domains where embedded systems are required, either oriented to application-specific or to programmable realisations. These are crucial in domains such as audio, telecom, instrumentation, speech, robotics, medical and automotive processing, image and video processing, TV, multimedia, radar and sonar.

The book will be of particular interest to the academic community because of the detailed descriptions of research results presented. In addition, many contributions feature the "real-life" applications that are responsible for driving research and the impact of their specific characteristics on the methodologies is assessed.

The publication will also be of considerable value to senior design engineers and CAD managers in the industrial arena, who wish either to anticipate the evolution of commercially available design tools or to utilize the presented concepts in their own R&D programmes.

A comprehensive overview of the current evolution of research in algorithms, architectures and compilation for parallel systems is provided by this publication.

The contributions focus specifically on domains where embedded systems are required, either oriented to application-specific or to programmable realisations. These are crucial in domains such as audio, telecom, instrumentation, speech, robotics, medical and automotive processing, image and video processing, TV, multimedia, radar and sonar.

The book will be of particular interest to the academic community because of the detailed descriptions of research results presented. In addition, many contributions feature the "real-life" applications that are responsible for driving research and the impact of their specific characteristics on the methodologies is assessed.

The publication will also be of considerable value to senior design engineers and CAD managers in the industrial arena, who wish either to anticipate the evolution of commercially available design tools or to utilize the presented concepts in their own R&D programmes

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Product Details

  • ISBN-13: 9780444821065
  • Publisher: Elsevier Science
  • Publication date: 3/28/1995
  • Pages: 424
  • Product dimensions: 1.00 (w) x 6.14 (h) x 9.21 (d)

Table of Contents

Introduction: algorithms and parallel VLSI architectures 1
1 Subspace methods in system identification and source localization 13
2 Pipelining the inverse updates RLS array by algorithmic engineering 25
3 Hierarchical signal flow graph representation of the square-root covariance Kalman filter 37
4 A systolic algorithm for block-regularized RLS identification 49
5 Numerical analysis of a normalised RLS filter using a probability description of propagated data 61
6 Adaptive approximate rotations for computing the symmetric EVD 73
7 Parallel implementation of the double bracket matrix flow for eigenvalue-eigenvector computation and sorting 85
8 Parallel block iterative solvers for heterogeneous computing environments 97
9 Efficient VLSI architecture for residue to binary converter 109
10 A case study in algorithm-architecture codesign: hardware-accelerator for long integer arithmetic 119
11 An optimisation methodology for mapping a diffusion algorithm for vision into a modular and flexible array architecture 131
12 A scalable design for dictionary machines 143
13 Systolic implementation of Smith and Waterman algorithm on a SIMD coprocessor 155
14 Architecture and programming of parallel video signal processors 167
15 A highly parallel single-chip video signal processor 179
16 A memory efficient, programmable multi-processor architecture for real-time motion estimation type algorithms 191
17 Instruction-level parallelism in asynchronous processor architectures 203
18 High speed wood inspection using a parallel VLSI architecture 215
19 CONVEX exemplar systems: scalable parallel processing 227
20 Modelling the 2-D FCT on a multiprocessor system 235
21 Parallel grep 245
22 Compiling for massively parallel architectures: a perspective 259
23 DIV, FLOOR, CEIL, MOD and STEP functions in nested loop programs and linearly bounded lattices 271
24 Uniformisation techniques for reducible integral recurrence equations 283
25 HOPP - A higher-order parallel programming model 295
26 Design by transformation of synchronous descriptions 307
27 Heuristics for evaluation of array expressions on state of the art massively parallel machines 319
28 On factors limiting the generation of efficient compiler-parallelized programs 331
29 From dependence analysis to communication code generation: the 'look forwards' model 341
30 Mapping complex image processing algorithms onto heterogeneous multi-processors regarding architecture dependent performance parameters 353
31 Optimal communication for a graph based DSP silicon compiler 365
32 Resource-constrained software pipelining for high-level synthesis of DSP systems 377
33 A portable testbed for evaluating different approaches to distributed logic simulation 389
34 A simulator for optical parallel computer architectures 401
Authors index 413
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