Asynchronous System-on-Chip Interconnect

Asynchronous System-on-Chip Interconnect

by John Bainbridge
     
 

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Asynchronous System-on-Chip Interconnect describes the use of an entirely asynchronous system-bus for the modular construction of integrated circuits. Industry is just awakening to the benefits of asynchronous design in avoiding the problems of clock-skew and multiple clock-domains, an din parallel with this is coming to grips with Intellectual Property (IP) based

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Overview

Asynchronous System-on-Chip Interconnect describes the use of an entirely asynchronous system-bus for the modular construction of integrated circuits. Industry is just awakening to the benefits of asynchronous design in avoiding the problems of clock-skew and multiple clock-domains, an din parallel with this is coming to grips with Intellectual Property (IP) based design flows which emphasise the need for a flexible interconnect strategy. In this book, John Bainbridge investigates the design of an asynchronous on-chip interconnect, looking at all the stages of the design from the choice of wiring layout, through asynchronous signalling prools to the higher level problems involved in supporting split transactions. The MARBLE bus (the first asynchronous SoC bus) used in a commercial demonstrator chip containing a mixture of asynchronous and synchronous macrocells is used as a concrete example throughout the book.

Product Details

ISBN-13:
9781852335984
Publisher:
Springer-Verlag New York, LLC
Publication date:
08/28/2002
Series:
Distinguished Dissertations Series
Edition description:
New Edition
Pages:
160
Product dimensions:
65.00(w) x 95.00(h) x 5.00(d)

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