CMOS Circuit Design for RF Sensors / Edition 1

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Overview

CMOS Circuit Design for RF Sensors is about CMOS circuit design for sensors and actuators to be used in wireless RF systems. The main application is implantable transducers for biomedical purposes, such as sensing of nerve signals, and electrical stimulation of nerves. Special focus is put on the power and data link in a wireless system with transducers which are powered via an RF link. Novel principles and methods are presented for the regulation of power to the sensors and for the distribution of data and power in an implanted transducer system. One of the main problems in such systems is the transmission of power via an RF link. This problem is analyzed in detail and solutions incorporating an RF magnetic link to the transducers are identified. The theoretical results are supported by experimental results from CMOS chips, including a system chip for functional electrical stimulation (FES). The work shows that a System on Chip (SoC) solution is feasible using CMOS technology for the RF sensors. The only components which cannot be integrated on the chip are the antenna coil and a capacitor for energy storage.

CMOS Circuit Design for RF Sensors will be a useful reference for academics as well as research scientists who are active in the field of analog circuit design and sensors.

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Product Details

Table of Contents

1 Introduction 1

2 Link design 7

2.1 Circuit-level link description 9

2.1.1 Transformer model 9

2.1.2 Transfer functions 11

2.1.3 Range 15

2.2 Electromagnetic view 16

2.2.1 Field calculations 17

2.2.2 Radiated power 19

2.2.3 Effect of geometry on coupling 19

2.2.4 Induced voltages 21

2.3 Coil design 23

2.3.1 Area versus inductance 23

2.3.2 Planar inductors 23

2.3.3 Field simulations 25

2.4 Transmitter design 26

2.4.1 Architectures 26

2.4.2 Implementations 30

2.4.3 Performance 33

3 Receivers 37

3.1 Requirements 37

3.1.1 Special conditions 38

3.1.2 Frequency allocation 40

3.1.3 Previous designs 41

3.2 Basic single-ended receiver 44

3.3 Low-power ASK demodulator 46

3.3.1 Passive input network 47

3.3.2 Squarer 48

3.3.3 Low-pass filter 49

3.3.4 Level detector 51

3.3.5 Experimental results 52

4 Power supply management 55

4.1 Shunt regulator 57

4.1.1 Regulator stability 58

4.1.2 Implementation 63

4.1.3 Design considerations 69

4.1.4 Figure of merit 72

4.1.5 Shunt test results 74

4.2 Rectifiers 76

4.2.1 Topologies 78

4.2.2 Dynamic full bridge behavior 83

4.2.3 CMOS full bridge 91

4.2.4 Experimental rectifier data 103

4.3 Internal linear regulators 106

4.3.1 Applications of linear regulators 108

4.3.2 Regulator architectures 110

4.3.3 A regulator proposal 114

4.3.4 Measurement results 119

4.3.5 Isolation performance 120

4.4 Supply quality 122

4.4.1 Contributing factors 123

4.4.2 Supply path functionality 124

5 Reference circuits 127

5.1 Bandgap references 128

5.1.1 Basic structure 129

5.1.2 Design considerations 130

5.1.3 Measurement results 133

5.1.4 Output resistance 136

5.2 Bias signal generation 136

5.2.1 Bias cells 136

5.2.2 Inversion limits for degenerate mirrors 137

5.3 Reset circuits 139

5.3.1 Reset strategy 140

5.3.2 An effective low-power reset circuit 142

5.3.3 Measurements 144

5.3.4 Other circuits 144

6 Case studies 147

6.1 Stimulator chip 147

6.1.1 Packaging 151

6.1.2 Spatial arrangement 152

6.1.3 Substrate design 155

6.1.4 Coil fabrication results 156

6.1.5 Measurements 157

6.2 Two-chip system transceiver 158

6.2.1 System overview 159

6.2.2 Bus communication 162

6.2.3 Results 162

Conclusion 165

Bibliography 169

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