Compilation Techniques for Reconfigurable Architectures
The extreme—exibility of reconfigurable architectures and their performance pot- tial have made them a vehicle of choice in a wide range of computing domains, from rapid circuit prototyping to high-performance computing. The increasing availab- ity of transistors on a die has allowed the emergence of reconfigurable architectures with a large number of computing resources and interconnection topologies. To - ploit the potential of these reconfigurable architectures, programmers are forced to map their applications, typically written in high-level imperative programming l- guages, such as C or MATLAB, to hardware-oriented languages such as VHDL or Verilog. In this process, they must assume the role of hardware designers and software programmers and navigate a maze of program transformations, mapping, and synthesis steps to produce efficient reconfigurable computing implementations. The richness and sophistication of any of these application mapping steps make the mapping of computations to these architectures an increasingly daunting process. It is thus widely believed that automatic compilation from high-level programming languages is the key to the success of reconfigurable computing. This book describes a wide range of code transformations and mapping te- niques for programs described in high-level programming languages, most - tably imperative languages, to reconfigurable architectures.
1101495926
Compilation Techniques for Reconfigurable Architectures
The extreme—exibility of reconfigurable architectures and their performance pot- tial have made them a vehicle of choice in a wide range of computing domains, from rapid circuit prototyping to high-performance computing. The increasing availab- ity of transistors on a die has allowed the emergence of reconfigurable architectures with a large number of computing resources and interconnection topologies. To - ploit the potential of these reconfigurable architectures, programmers are forced to map their applications, typically written in high-level imperative programming l- guages, such as C or MATLAB, to hardware-oriented languages such as VHDL or Verilog. In this process, they must assume the role of hardware designers and software programmers and navigate a maze of program transformations, mapping, and synthesis steps to produce efficient reconfigurable computing implementations. The richness and sophistication of any of these application mapping steps make the mapping of computations to these architectures an increasingly daunting process. It is thus widely believed that automatic compilation from high-level programming languages is the key to the success of reconfigurable computing. This book describes a wide range of code transformations and mapping te- niques for programs described in high-level programming languages, most - tably imperative languages, to reconfigurable architectures.
109.99
In Stock
5
1
Compilation Techniques for Reconfigurable Architectures
223
Compilation Techniques for Reconfigurable Architectures
223
109.99
In Stock
Product Details
| ISBN-13: | 9780387096704 |
|---|---|
| Publisher: | Springer US |
| Publication date: | 10/20/2008 |
| Edition description: | 2009 |
| Pages: | 223 |
| Product dimensions: | 6.30(w) x 9.30(h) x 0.70(d) |
From the B&N Reads Blog