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Overview

The authors take a “No Mysteries” approach to computer systems. They interrelate three different viewpoints to provide a unique understanding of the subject: the perspective of the logic designer, the assembly language programmer, and the computer architect. The book has up-to-the-minute coverage of the latest developments in microprocessors, including ALU, pipelining, memory hierarchy, networks and the Internet. And, rather than focusing on a single type of architecture, Heuring and Jordan examine both CISC and RISC models at the ISA level using the unambiguous language of RTN (Register Transfer Notation), allowing for a more in-depth appreciation of different machine structures and functions. The authors examine general purpose machine, machine languages, and digital logic, some real machines, processor design, processor design—advanced topics, computer arithmetic and the arithmetic unit, memory system design, input and output, peripheral devices, communications, networking and the Internet. For computer science and engineering professionals.

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Product Details

  • ISBN-13: 9780130484406
  • Publisher: Prentice Hall
  • Publication date: 2/1/2004
  • Edition description: 2ND
  • Edition number: 2
  • Pages: 608
  • Sales rank: 1,208,996
  • Product dimensions: 8.00 (w) x 9.20 (h) x 1.40 (d)

Read an Excerpt

To the Instructor

This book is suitable for an introductory course on computer design at the junior, senior, or introductory graduate level. We assume that the student has had at least an introductory course in some high-level programming language such as C or Pascal, and a semester of logic design. However, a comprehensive appendix on digital logic design, written by Professor Miles Murdocca of the Internet Institute USA, provides sufficient background material for teaching the course to students without previous digital design experience.

Appropriate topics for such a book have changed considerably in recent years, as desktop computers have evolved from simple, stand-alone units into complex systems attached to high-speed networks and internetworks. Earlier generations of microprocessors had almost trivial internal structure Present designs contain multiple pipelined functional units with support for multiple processors and memories. Areas of computer design and architecture that were barely touched upon in the not-so-distant past have become major topics for discussion. Introductory compiler courses now routinely discuss optimization for pipelined processors. Users worry about whether they should add level-2 cache memory to their PCs. Support personnel wearily try to explain to the computer user how to configure the subnet mask for their network slip connection.

The topics of pipelined processor design, the memory hierarchy, and networks and internetworking are moving to center stage in the arena of computer design and architecture. Therefore we devoted the major parts of three chapters to treatment of these subjects.

Given the focus on computer design and computer architecture, we approach the study of the computer from three viewpoints: the view of the assembly/machine language programmer, the view of the logic designer, and the view of the system architect.

In covering the topic of gate-level computer design, we follow a model architecture through the design process, from the instruction set design level to the processor design level. Given the choice of using either a commercial machine with all of the complicating features that are necessary to make such a machine commercially successful, or using a model design that introduces enough practical features to make it both interesting and relevant to the subject, we chose the latter. The model machine, Simple RISC Computer (SRC), is a 32-bit machine with an instruction set architecture that is similar to, but simpler than the current generation of RISC's.

We adopt the view that it is best to use a formal description language in describing machine structure and function. There are many languages from which to choose. We selected a variant of the ISP language, Register Transfer Notation (RTN). We chose this from many alternatives, because most of the languages used by practitioners are aimed more at hardware description and less at machine behavior and function. RTN is simple, easy to learn, and is at the appropriate description level.

To the Student

The computer ushers us into the information age. Born a mere fifty years ago, it now exerts a profound influence on almost every facet of our lives. What is the nature of this machine? How does it work inside? How is it programmed internally? What is the nature of each of its connections to the outside world? These are the questions that this book will help you answer, and we hope that when you have mastered it you will be left with no mysteries about how computers work. We feel that one of the best ways to learn how a computer works is to design one, so throughout most of the book we have taken the perspective of the designer rather than that of the observer or the critic.

Computers are arguably the most complex systems humankind has ever built, and like all complex systems they can be appreciated from many viewpoints. A building can be examined for its overall architectural design, and for the way its design affects its overall function. A building also can be examined from the viewpoint of how the size and shape of its rooms and halls relate to the design of its heating and air conditioning systems. Likewise a computer can be examined from the viewpoint of its overall structure and function, referred to as its architecture. A computer also can be examined from the viewpoint of one who is using machine or assembly language to program it. And it can be examined from the viewpoint of its lowest abstract logical structure-its design at the logic gate level.

All of these viewpoints are interrelated, and therefore important for mastery of the subject; thus in this book we adopt all three: the viewpoint of the computer architect, the viewpoint of the assembly language programmer, and the viewpoint of the logic designer. We believe that the synthesis of these three views will give you a depth and richness of understanding of the subject that will serve you well, whether your main interest is in computer design, computer science, or computer programming.

We assume that you have -had experience with computers as an end-user, and that you have written programs in some high-level language such as Pascal, C, or FORTRAN. We also assume, in the body of the text, that you have had exposure to digital logic circuits. A knowledge of logic circuits is necessary for the understanding of the material in this book. For those who have not had such exposure, or who are uncertain about whether their background in this area is adequate, we have included Appendix A: Digital Logic Circuits, which should provide you with sufficient background for understanding this text.

Preface to the Second Edition

It is a truism that computer design and architecture textbooks are out of date before the printer's ink is dry. Such is always the case in a field as dynamic and growing as ours. While this places more burden on the authors to revise, update, and release new editions, it also presents opportunities to introduce new material, new tools, and new or expanded discussions of old topics. All of these factors contributed to the desire to develop a second edition of Computer Systems Design and Architecture (CSDA). We have continued to adhere to the principle of "no mysteries" in this edition, especially as it pertains to the fundamentals of computer design.

This approach has meant sacrificing ancillary or overly descriptive materials relating to modern processors to keep the textbook to a reasonable size. It was, and continues to be our philosophy that a thorough grounding in the fundamental principles of computer design rather than a more superficial discussion of the architectures du jour will better meet the needs of students to master the architectures of the future.

New in the second edition:

Tools. Java-based assemblers and simulators with GUI-based interfaces are now available for SRC, the MC68000, and ARC, a SPARC subset. The simulators run on the PC and Macintosh OSX platforms, and all Unix and Linux implementations that run the Java Virtual Machine. VHDL and LogicWorks models of SRC are also available.

The following new or expanded topics have been added:

All chapters have been brought up to date with current information. There are many new and modified Exercises and Examples, including a new feature, Classic Example.

Chapter 2. Expanded discussion of the timing of bus operations during register transfers, including a timing diagram.

Chapter 2. A greatly expanded discussion of performance measurement and estimation. New material on the Pentium 4 architecture.

Chapter 3. New section on calculating performance/speedup.

Chapter 4. Details of the SRC ALU design. New material on SRC control signals.

Chapter 5. Expanded discussion of instruction-level parallelism, including a VLIW design for SRC.

Chapter 7. Discussion and example of temporal and spatial locality. Discussion and examples of SDRAM and DDR RAM.

Chapter 8. Summary of SRC I/O ports. New section using Venn Diagrams to motiv4te the discussion of Hamming and SECDED encoding.

Chapter 9. New section on Disk System reliability, including RAID and SMART disk drives.

Chapter 10. New section on Gigabit Ethernet. New section on Modern Serial Buses: USB and Firewire. New section on Wasted IP address space: CIDR classless routing, NAT, and DHCP.

Appendix C: Rewritten to target the SRC assembler instead of the 68K assembler. More detailed discussion of the symbol table and the assembly process.

Appendix D: Due to popular student demand, Appendix D, Selected Problems and Solutions, was added. This appendix contains a selection of "classic" problems in computer design and architecture.

Using This Book With Your Curriculum and Syllabus

There are probably almost as many different curricula and syllabi for computer design and architecture as there are schools and instructors in which the subject is taught. As you evaluate the material in this book you may discover the following:

  • Some topics may have been covered in a prerequisite course, and so can be omitted.
  • Some topics need not be covered because they are covered in a subsequent course or courses.
  • Some topics can be omitted or emphasized because of the aims of the course or the instructor. For example, computer science curricula may stress architectural topics and deemphasize the gate-level design material, whereas computer engineering curricula would stress gate-level design.
  • Some instructors will choose to emphasize or deemphasize certain topics or change the topic ordering because of their particular philosophy of how the material should be presented.

We have tried to make the topic coverage sufficiently inclusive and self-contained so that you can adapt it to suit your curricula and syllabi. The following figure presents a chart of chapter dependences to aid you in selecting the topics and topic ordering to suit your particular needs. The first two chapters set the stage for the rest of the book, and should be covered first. Chapter 3 treats real machine designs and is essential for any student without a solid background in CISC and RISC instruction sets. Chapters 4 and 5 pursue gate-level design of the CPU. Each of Chapters 6-10 is virtually stand-alone, and can be selected to suit the needs of your particular curriculum and syllabus.

Chapter Descriptions

Chapter 1 takes a brief look at the machine from all three levels, and provides an overview on the subject.

Chapter 2 begins with a discussion of the relationship between machines and machine languages—how the nature of the instruction set influences the rest of the CPU structure. At this point we introduce a language for formally describing machine structure and function. That is, we provide a way to unambiguously describe both the machine hardware and how instructions run on it. That language, RTN, is a simple one, and it is at the "just right" level to describe the running of instructions on hardware. We introduce RTN by using it to describe a generic model machine, SRC, that has a 32-bit ISA similar to the current crop of 32-bit commercial machines, but without many of the complicating factors. The chapter concludes by switching to the logic circuit level and putting a computer design spin on conventional logic circuit design by a brief discussion of how RTN operations translate into circuit designs.

The goal of Chapter 3 is to provide the student with a concrete understanding of the difference between CISC and RISC machines. It discusses two commercial machines at the ISA (and RTN) level: the CISC Motorola MC68000 and the RISC SPARC. The chapter provides familiarity with several different machine architectures at the ISA level, so that students develop an appreciation for two philosophically different approaches to machine design. We also discuss some practical issues, such as upward compatibility, and how those issues influence machine design.

Chapter 4 is in many ways the keystone chapter of the book. It describes the interface between the instruction set and the hardware that it runs on, at the gate level. This description unfolds by developing a 1-bus design for the SRC introduced in Chapter 2, with RTN descriptions of machine functioning as a guide. Beginning with the ISA registers, the RTN description adds additional registers that are hidden at the ISA level as it treats how instructions are fetched, decoded, and executed, again at gate level. The discussion proceeds with the design of the "soul of the machine," the control unit, and its heartbeat, the system clocking and timing. This chapter also begins the discussion of how hardware design influences instruction execution speed by examining alternative 2- and 3-bus designs. Two other aspects of processor design are covered in this chapter: the hardware reset, and the exception process. Our goal in Chapter 4 is to leave no mysteries. At the end of the chapter, the student should understand exactly how the central processing unit works at the gate level.

Chapter 5 covers pipelining of the CPU, multiple-instruction-issue machines, and microcoded control unit design. Nearly every current and planned processor design employs pipelining in its CPU, and a thorough understanding of how' pipelining works is a necessity for everyone from compiler writers to machine programmers and architects. We first present an overview of the important issues in pipelining and then show the pipeline design process by way of a pipelined design for SRC. A discussion of instruction-level parallelism follows. We treat superscalar operation, where there are multiple functional machines units in the CPU that are capable of parallel operation, and VLIW, very long instruction word machines, whose instruction words contain a number of processing steps that are executed in parallel. We include an example of a VLIW implementation of SRC. The chapter concludes with a discussion of microcoding. Microcoding is not used much in general purpose microprocessor chips at present, but in addition to its use in fast-turn around and adaptable special purpose designs, it presents an interesting perspective on computer design.

ALU Chapter 6 covers the design of the arithmetic and logic unit (ALU) of the computer. The design of this very important CPU component has a major impact on overall system performance. Since much of the ALU's performance is based on the underlying algorithms that are implemented in the hardware design, the discussion proceeds from data type (e.g., aspects integer), to algorithm (e.g., addition), to the hardware implementation (e.g., a carry looka-head fast adder). Both integer and floating-point data types are covered. A section is arithmetic included on how branch instructions use the ALU with a discussion of logic operations and overall ALU design. The chapter concludes with a discussion of floating-point arithmetic.

Chapter 7 presents the design of the memory hierarchy in detail. Beginning with the simplest 1-bit RAM and ROM cells, the chapter builds those cells into chips, chips into boards, and boards into modules. We discuss the general nature of the relationship between two adjacent levels in the hierarchy, and following that, we discuss cache design and the interaction between cache and main memory. This is followed by a discussion of virtual memory, the process of allowing the memory space to spill out from main memory onto the disk. The chapter concludes with a discussion of memory as a system.

Chapter 8 discusses the details of the machine's I/O system. It begins with a treatment of several kinds of buses, treating both bus signals and bus timing, and proceeds with a discussion of the two principal kinds of generic I/O interfaces, serial and parallel. The chapter then covers the relationship between the machine interrupt structure and the I/O system, and between these two and DMA, direct memory access, by which an external device can access main memory without CPU intervention.

Chapter 9 covers the other end of the I/O system: peripheral devices. It treats the structure and functioning of disk drives, video and other interactive display devices, printers, mice, and the interfaces to analog devices. The emphasis is on how these devices actually work, and the nature of the interface between them, the CPU, and the outside world. Peripheral device performance is covered as a main aspect of interest.

Chapter 10 concludes the book with a discussion of computer-to-computer communications. No current treatment of computer systems design and architecture is complete without a fairly in-depth discussion of computer communications and networking. We begin with a discussion of network structure and topology. Following that we present three examples of contemporary machine communications. The first example is the RS-232 serial data communications protocol that permits point-to-point communications between two computers or between a computer and a terminal. The second example is the Ethernet local area network (LAN). We discuss the Ethernet communications protocol at both the physical level and the data link layer, including the Ethernet packet structure, and higher-speed implementations. We also discuss USB and Firewire. The final example of a communications system is the Internet—probably the largest and most important computer communications system on the planet. We discuss the TCP/IP Internet protocol, and Internet addresses and addressing. Also discussed is the wasting of IP addresses by the class A, B, C system, and the use of CIDR, DHCI, and NAT to reclaim them. The chapter, and the book conclude with a very brief discussion of Internet applications and Internet futures.

Instructional Support Materials

For the latest information on these supplements and how to obtain instructional support materials, contact your Prentice-Hall sales representative or visit the Prentice-Hall web site at http://www.prenhall.com.

Solutions Manual. The Solutions Manual contains solutions to virtually all end-of-chapter exercises in Computer Systems Design and Architecture.

Electronic Lecture Slides. This set of approximately 600 slides is available in two formats, Adobe Acrobat and Microsoft PowerPoint. The slides include the book's main points presented in a lecture outline format, and nearly all figures and tables from the text. Using the free Acrobat Reader, the transparencies in the Acrobat format can be viewed and printed in various ways from PC, Macintosh, and UNIX platforms. Instructors who have access to PowerPoint can modify the slides in the PowerPoint format. The slides are available at ftp://schof.colorado.edu/pub/CSDA.

Software Support Tools. A growing collection of software support tools are available to adopters by ftp. These tools include Java-based SRC, MC68000, and SPARC subset assemblers and simulators that will run on the PC, Macintosh OSX, and Unix and Linux platforms. VHDL and LogicWorks implementations of SRC are also available. The tools and several other resources are available at ftp://schof.colorado.edu/pub/CSDA.

If You Find an Error

In spite of the good efforts of the authors, editors, reviewers, and class testers, this book undoubtedly contains errors. Please send reports of errors to csdabugs@colorado.edu

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Table of Contents

1. The General Purpose Machine.

The General Purpose Machine. The User's View. The Machine/Assembly Language Programmer's View. The Computer Architect's View. The Computer System Logic Designer's View. Historical Perspective. Trends and Research. Approach of the Text.

2. Machines, Machine Languages, and Digital Logic.

Classification of Computers and Their Instructions. Computer Instruction Sets. Informal Description of the Simple RISC Computer, SRC. Formal Description of SRC Using Register Transfer Notation, RTN. Describing Addressing Modes with RTN. Register Transfers and Logic Circuits: From Behavior to Hardware.

3. Some Real Machines.

Machine Characteristics and Performance. RISC versus CISC. A CISC Microprocessor: the Motorola MC68000. A RISC Architecture: The SPARC.

4. Processor Design.

The Design Process. A 1-Bus Microarchitecture for the SRC. Data Path Implementation. Logic Design for the 1-Bus SRC. The Control Unit. 2- And 3-Bus Processor Designs. The Machine Reset. Machine Exceptions.

5. Processor Design—Advanced Topics.

Pipelining. Instruction-Level Parallelism. Microprogramming.

6. Computer Arithmetic and the Arithmetic Unit.

Number Systems and Radix Conversion. Fixed Point Arithmetic. Semi-Numeric Aspects of ALU Design. Floating Point Arithmetic.

7. Memory System Design.

Introduction: The Components of the Memory System. RAM Structure: The Logic Designer's Perspective. Memory Boards and Modules. Two Level Memory Hierarchy. The Cache. Virtual Memory. The Memory Subsystem In the Computer.

8. Input and Output.

The I/O Subsystem. Programmed I/O. I/O Interrupts. Direct Memory Access (DMA). I/O Data Format Change and Error Control.

9. Peripheral Devices.

Magnetic Disk Drives. Improving Disk Drive Performance and Reliability. Other Mass Storage Devices. Display Devices. Printers. Input Devices. Interfacing to the Analog World.

10. Communications, Networking and the Internet.

Computer to Computer Data Communications. Serial Data Communications Protocols. Local Area Networks. Modern Serial Buses: USB and Firewire. The Internet.

Appendix A: Digital Logic.

Appendix B: RTN Description of SRC.

Appendix C: Assembly and Assemblers.

Appendix D: Tutorial on Machine Representations and Arithmetic.

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Preface

To the Instructor

This book is suitable for an introductory course on computer design at the junior, senior, or introductory graduate level. We assume that the student has had at least an introductory course in some high-level programming language such as C or Pascal, and a semester of logic design. However, a comprehensive appendix on digital logic design, written by Professor Miles Murdocca of the Internet Institute USA, provides sufficient background material for teaching the course to students without previous digital design experience.

Appropriate topics for such a book have changed considerably in recent years, as desktop computers have evolved from simple, stand-alone units into complex systems attached to high-speed networks and internetworks. Earlier generations of microprocessors had almost trivial internal structure Present designs contain multiple pipelined functional units with support for multiple processors and memories. Areas of computer design and architecture that were barely touched upon in the not-so-distant past have become major topics for discussion. Introductory compiler courses now routinely discuss optimization for pipelined processors. Users worry about whether they should add level-2 cache memory to their PCs. Support personnel wearily try to explain to the computer user how to configure the subnet mask for their network slip connection.

The topics of pipelined processor design, the memory hierarchy, and networks and internetworking are moving to center stage in the arena of computer design and architecture. Therefore we devoted the major parts of three chapters to treatment of these subjects.

Given the focus on computer design and computer architecture, we approach the study of the computer from three viewpoints: the view of the assembly/machine language programmer, the view of the logic designer, and the view of the system architect.

In covering the topic of gate-level computer design, we follow a model architecture through the design process, from the instruction set design level to the processor design level. Given the choice of using either a commercial machine with all of the complicating features that are necessary to make such a machine commercially successful, or using a model design that introduces enough practical features to make it both interesting and relevant to the subject, we chose the latter. The model machine, Simple RISC Computer (SRC), is a 32-bit machine with an instruction set architecture that is similar to, but simpler than the current generation of RISC's.

We adopt the view that it is best to use a formal description language in describing machine structure and function. There are many languages from which to choose. We selected a variant of the ISP language, Register Transfer Notation (RTN). We chose this from many alternatives, because most of the languages used by practitioners are aimed more at hardware description and less at machine behavior and function. RTN is simple, easy to learn, and is at the appropriate description level.

To the Student

The computer ushers us into the information age. Born a mere fifty years ago, it now exerts a profound influence on almost every facet of our lives. What is the nature of this machine? How does it work inside? How is it programmed internally? What is the nature of each of its connections to the outside world? These are the questions that this book will help you answer, and we hope that when you have mastered it you will be left with no mysteries about how computers work. We feel that one of the best ways to learn how a computer works is to design one, so throughout most of the book we have taken the perspective of the designer rather than that of the observer or the critic.

Computers are arguably the most complex systems humankind has ever built, and like all complex systems they can be appreciated from many viewpoints. A building can be examined for its overall architectural design, and for the way its design affects its overall function. A building also can be examined from the viewpoint of how the size and shape of its rooms and halls relate to the design of its heating and air conditioning systems. Likewise a computer can be examined from the viewpoint of its overall structure and function, referred to as its architecture. A computer also can be examined from the viewpoint of one who is using machine or assembly language to program it. And it can be examined from the viewpoint of its lowest abstract logical structure-its design at the logic gate level.

All of these viewpoints are interrelated, and therefore important for mastery of the subject; thus in this book we adopt all three: the viewpoint of the computer architect, the viewpoint of the assembly language programmer, and the viewpoint of the logic designer. We believe that the synthesis of these three views will give you a depth and richness of understanding of the subject that will serve you well, whether your main interest is in computer design, computer science, or computer programming.

We assume that you have -had experience with computers as an end-user, and that you have written programs in some high-level language such as Pascal, C, or FORTRAN. We also assume, in the body of the text, that you have had exposure to digital logic circuits. A knowledge of logic circuits is necessary for the understanding of the material in this book. For those who have not had such exposure, or who are uncertain about whether their background in this area is adequate, we have included Appendix A: Digital Logic Circuits, which should provide you with sufficient background for understanding this text.

Preface to the Second Edition

It is a truism that computer design and architecture textbooks are out of date before the printer's ink is dry. Such is always the case in a field as dynamic and growing as ours. While this places more burden on the authors to revise, update, and release new editions, it also presents opportunities to introduce new material, new tools, and new or expanded discussions of old topics. All of these factors contributed to the desire to develop a second edition of Computer Systems Design and Architecture (CSDA). We have continued to adhere to the principle of "no mysteries" in this edition, especially as it pertains to the fundamentals of computer design.

This approach has meant sacrificing ancillary or overly descriptive materials relating to modern processors to keep the textbook to a reasonable size. It was, and continues to be our philosophy that a thorough grounding in the fundamental principles of computer design rather than a more superficial discussion of the architectures du jour will better meet the needs of students to master the architectures of the future.

New in the second edition:

Tools. Java-based assemblers and simulators with GUI-based interfaces are now available for SRC, the MC68000, and ARC, a SPARC subset. The simulators run on the PC and Macintosh OSX platforms, and all Unix and Linux implementations that run the Java Virtual Machine. VHDL and LogicWorks models of SRC are also available.

The following new or expanded topics have been added:

All chapters have been brought up to date with current information. There are many new and modified Exercises and Examples, including a new feature, Classic Example.

Chapter 2. Expanded discussion of the timing of bus operations during register transfers, including a timing diagram.

Chapter 2. A greatly expanded discussion of performance measurement and estimation. New material on the Pentium 4 architecture.

Chapter 3. New section on calculating performance/speedup.

Chapter 4. Details of the SRC ALU design. New material on SRC control signals.

Chapter 5. Expanded discussion of instruction-level parallelism, including a VLIW design for SRC.

Chapter 7. Discussion and example of temporal and spatial locality. Discussion and examples of SDRAM and DDR RAM.

Chapter 8. Summary of SRC I/O ports. New section using Venn Diagrams to motiv4te the discussion of Hamming and SECDED encoding.

Chapter 9. New section on Disk System reliability, including RAID and SMART disk drives.

Chapter 10. New section on Gigabit Ethernet. New section on Modern Serial Buses: USB and Firewire. New section on Wasted IP address space: CIDR classless routing, NAT, and DHCP.

Appendix C: Rewritten to target the SRC assembler instead of the 68K assembler. More detailed discussion of the symbol table and the assembly process.

Appendix D: Due to popular student demand, Appendix D, Selected Problems and Solutions, was added. This appendix contains a selection of "classic" problems in computer design and architecture.

Using This Book With Your Curriculum and Syllabus

There are probably almost as many different curricula and syllabi for computer design and architecture as there are schools and instructors in which the subject is taught. As you evaluate the material in this book you may discover the following:

  • Some topics may have been covered in a prerequisite course, and so can be omitted.
  • Some topics need not be covered because they are covered in a subsequent course or courses.
  • Some topics can be omitted or emphasized because of the aims of the course or the instructor. For example, computer science curricula may stress architectural topics and deemphasize the gate-level design material, whereas computer engineering curricula would stress gate-level design.
  • Some instructors will choose to emphasize or deemphasize certain topics or change the topic ordering because of their particular philosophy of how the material should be presented.

We have tried to make the topic coverage sufficiently inclusive and self-contained so that you can adapt it to suit your curricula and syllabi. The following figure presents a chart of chapter dependences to aid you in selecting the topics and topic ordering to suit your particular needs. The first two chapters set the stage for the rest of the book, and should be covered first. Chapter 3 treats real machine designs and is essential for any student without a solid background in CISC and RISC instruction sets. Chapters 4 and 5 pursue gate-level design of the CPU. Each of Chapters 6-10 is virtually stand-alone, and can be selected to suit the needs of your particular curriculum and syllabus.

Chapter Descriptions

Chapter 1 takes a brief look at the machine from all three levels, and provides an overview on the subject.

Chapter 2 begins with a discussion of the relationship between machines and machine languages—how the nature of the instruction set influences the rest of the CPU structure. At this point we introduce a language for formally describing machine structure and function. That is, we provide a way to unambiguously describe both the machine hardware and how instructions run on it. That language, RTN, is a simple one, and it is at the "just right" level to describe the running of instructions on hardware. We introduce RTN by using it to describe a generic model machine, SRC, that has a 32-bit ISA similar to the current crop of 32-bit commercial machines, but without many of the complicating factors. The chapter concludes by switching to the logic circuit level and putting a computer design spin on conventional logic circuit design by a brief discussion of how RTN operations translate into circuit designs.

The goal of Chapter 3 is to provide the student with a concrete understanding of the difference between CISC and RISC machines. It discusses two commercial machines at the ISA (and RTN) level: the CISC Motorola MC68000 and the RISC SPARC. The chapter provides familiarity with several different machine architectures at the ISA level, so that students develop an appreciation for two philosophically different approaches to machine design. We also discuss some practical issues, such as upward compatibility, and how those issues influence machine design.

Chapter 4 is in many ways the keystone chapter of the book. It describes the interface between the instruction set and the hardware that it runs on, at the gate level. This description unfolds by developing a 1-bus design for the SRC introduced in Chapter 2, with RTN descriptions of machine functioning as a guide. Beginning with the ISA registers, the RTN description adds additional registers that are hidden at the ISA level as it treats how instructions are fetched, decoded, and executed, again at gate level. The discussion proceeds with the design of the "soul of the machine," the control unit, and its heartbeat, the system clocking and timing. This chapter also begins the discussion of how hardware design influences instruction execution speed by examining alternative 2- and 3-bus designs. Two other aspects of processor design are covered in this chapter: the hardware reset, and the exception process. Our goal in Chapter 4 is to leave no mysteries. At the end of the chapter, the student should understand exactly how the central processing unit works at the gate level.

Chapter 5 covers pipelining of the CPU, multiple-instruction-issue machines, and microcoded control unit design. Nearly every current and planned processor design employs pipelining in its CPU, and a thorough understanding of how' pipelining works is a necessity for everyone from compiler writers to machine programmers and architects. We first present an overview of the important issues in pipelining and then show the pipeline design process by way of a pipelined design for SRC. A discussion of instruction-level parallelism follows. We treat superscalar operation, where there are multiple functional machines units in the CPU that are capable of parallel operation, and VLIW, very long instruction word machines, whose instruction words contain a number of processing steps that are executed in parallel. We include an example of a VLIW implementation of SRC. The chapter concludes with a discussion of microcoding. Microcoding is not used much in general purpose microprocessor chips at present, but in addition to its use in fast-turn around and adaptable special purpose designs, it presents an interesting perspective on computer design.

ALU Chapter 6 covers the design of the arithmetic and logic unit (ALU) of the computer. The design of this very important CPU component has a major impact on overall system performance. Since much of the ALU's performance is based on the underlying algorithms that are implemented in the hardware design, the discussion proceeds from data type (e.g., aspects integer), to algorithm (e.g., addition), to the hardware implementation (e.g., a carry looka-head fast adder). Both integer and floating-point data types are covered. A section is arithmetic included on how branch instructions use the ALU with a discussion of logic operations and overall ALU design. The chapter concludes with a discussion of floating-point arithmetic.

Chapter 7 presents the design of the memory hierarchy in detail. Beginning with the simplest 1-bit RAM and ROM cells, the chapter builds those cells into chips, chips into boards, and boards into modules. We discuss the general nature of the relationship between two adjacent levels in the hierarchy, and following that, we discuss cache design and the interaction between cache and main memory. This is followed by a discussion of virtual memory, the process of allowing the memory space to spill out from main memory onto the disk. The chapter concludes with a discussion of memory as a system.

Chapter 8 discusses the details of the machine's I/O system. It begins with a treatment of several kinds of buses, treating both bus signals and bus timing, and proceeds with a discussion of the two principal kinds of generic I/O interfaces, serial and parallel. The chapter then covers the relationship between the machine interrupt structure and the I/O system, and between these two and DMA, direct memory access, by which an external device can access main memory without CPU intervention.

Chapter 9 covers the other end of the I/O system: peripheral devices. It treats the structure and functioning of disk drives, video and other interactive display devices, printers, mice, and the interfaces to analog devices. The emphasis is on how these devices actually work, and the nature of the interface between them, the CPU, and the outside world. Peripheral device performance is covered as a main aspect of interest.

Chapter 10 concludes the book with a discussion of computer-to-computer communications. No current treatment of computer systems design and architecture is complete without a fairly in-depth discussion of computer communications and networking. We begin with a discussion of network structure and topology. Following that we present three examples of contemporary machine communications. The first example is the RS-232 serial data communications protocol that permits point-to-point communications between two computers or between a computer and a terminal. The second example is the Ethernet local area network (LAN). We discuss the Ethernet communications protocol at both the physical level and the data link layer, including the Ethernet packet structure, and higher-speed implementations. We also discuss USB and Firewire. The final example of a communications system is the Internet—probably the largest and most important computer communications system on the planet. We discuss the TCP/IP Internet protocol, and Internet addresses and addressing. Also discussed is the wasting of IP addresses by the class A, B, C system, and the use of CIDR, DHCI, and NAT to reclaim them. The chapter, and the book conclude with a very brief discussion of Internet applications and Internet futures.

Instructional Support Materials

For the latest information on these supplements and how to obtain instructional support materials, contact your Prentice-Hall sales representative or visit the Prentice-Hall web site at http://www.prenhall.com.

Solutions Manual. The Solutions Manual contains solutions to virtually all end-of-chapter exercises in Computer Systems Design and Architecture.

Electronic Lecture Slides. This set of approximately 600 slides is available in two formats, Adobe Acrobat and Microsoft PowerPoint. The slides include the book's main points presented in a lecture outline format, and nearly all figures and tables from the text. Using the free Acrobat Reader, the transparencies in the Acrobat format can be viewed and printed in various ways from PC, Macintosh, and UNIX platforms. Instructors who have access to PowerPoint can modify the slides in the PowerPoint format. The slides are available at ftp://schof.colorado.edu/pub/CSDA.

Software Support Tools. A growing collection of software support tools are available to adopters by ftp. These tools include Java-based SRC, MC68000, and SPARC subset assemblers and simulators that will run on the PC, Macintosh OSX, and Unix and Linux platforms. VHDL and LogicWorks implementations of SRC are also available. The tools and several other resources are available at ftp://schof.colorado.edu/pub/CSDA.

If You Find an Error

In spite of the good efforts of the authors, editors, reviewers, and class testers, this book undoubtedly contains errors. Please send reports of errors to csdabugs@colorado.edu

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