The Designer's Guide to Jitter in Ring Oscillators / Edition 1

The Designer's Guide to Jitter in Ring Oscillators / Edition 1

by John A. McNeill, David Ricketts
     
 

ISBN-10: 1441945601

ISBN-13: 9781441945600

Pub. Date: 12/09/2010

Publisher: Springer US

The Designer's Guide to Jitter in Ring Oscillators provides information for engineers on designing voltage controlled oscillators (VCOs) and phase-locked loops (PLLs) for low jitter applications such as serial data communication and clock synthesis. The material is presented in a clear, intuitive fashion at both the system level and the circuit level to help

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Overview

The Designer's Guide to Jitter in Ring Oscillators provides information for engineers on designing voltage controlled oscillators (VCOs) and phase-locked loops (PLLs) for low jitter applications such as serial data communication and clock synthesis. The material is presented in a clear, intuitive fashion at both the system level and the circuit level to help designers improve their understanding of fundamental noise sources and design low jitter circuitry within power, area, and process constraints so that ultimate performance meets system level requirements.

At the system level, the authors describe and specify different methods of measuring jitter to characterize time domain uncertainty. Although the emphasis is on time-domain measures of oscillator performance, a simple method of translating performance to frequency domain (phase noise) measures is also included.

At the circuit level, the authors include techniques for design of low jitter delay elements for use in ring oscillators, as well as relating the circuit-level characteristics to system level performance. The authors discuss a classification scheme for delay stages to help guide the designer's choice with regard to signal type (single-ended vs. differential), output format (single phase vs. multiple phase), and tuning method. Simple mathematical expressions are developed describing the noise-power tradeoffs for each type of stage, so the designer can quickly estimate the power dissipation required to achieve a desired level of jitter.

The Designer's Guide to Jitter in Ring Oscillators is an excellent resource for engineers and researchers interested in jitter and ring oscillators and their application incommunication systems.

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Product Details

ISBN-13:
9781441945600
Publisher:
Springer US
Publication date:
12/09/2010
Series:
Designer's Guide Book Series
Edition description:
Softcover reprint of hardcover 1st ed. 2009
Pages:
276
Product dimensions:
0.62(w) x 6.14(h) x 9.21(d)

Table of Contents

1 Introduction to oscillator jitter 1

1.1 Applications 1

1.1.1 Clock recovery in serial data transmission 1

1.1.2 Methods of clock and data recovery 3

1.1.3 Other applications 4

1.1.4 Summary 5

1.2 Types of VCOs 7

1.2.1 LC resonant 7

1.2.2 Multivibrator 8

1.2.3 Ring oscillator 8

1.3 Motivation and goals of this book 9

1.4 Chapter summary 11

2 Classification of ring oscillators 13

2.1 Type of signal in the ring 13

2.1.1 Single-ended 14

2.1.2 True differential 16

2.1.3 Pseudo differential 18

2.1.4 Regenerative switching 21

2.1.5 Signal format summary 21

2.2 Tuning method 21

2.2.1 Number of stages 22

2.2.2 Loading 24

2.2.3 Drive strength 27

2.2.4 Voltage 28

2.2.5 A Note on linearity 29

2.2.6 Summary 29

2.3 Output format 29

2.3.1 Single output 31

2.3.2 Dual output (quadrature) 33

2.3.3 Multiple output 34

2.3.4 Summary 34

2.4 Chapter summary 34

3 Phase-Locked Loop System Concepts 35

3.1 Phase and frequency concepts 35

3.2 Phase and jitter concepts in PLL applications 39

3.2.1 Response of PLL loop to input signal and VCO phase noise 40

3.2.2 Summary 43

3.3 Measuring phase 43

3.3.1 Time Domain 43

3.3.2 Time domain: two sample standard deviation 44

3.3.3 Frequency Domain 46

3.3.4 Summary 49

3.4 Measures that will be related in this book 49

3.4.1 Case (i): Frequency domain, VCO open loop 50

3.4.2 Case (ii): Frequency domain, PLL closed loop 52

3.4.3 Case (iii): Time domain, closed loop, transmit clock referenced 54

3.4.4 Case (iv): Time domain, closed loop, self-referenced 56

3.4.5 Case (v): Time domain, open loop, self referenced 58

3.5 Chapter Summary 59

Appendix 3AApproximate loop transfer functions 62

Appendix 3B Power spectra relationships 66

4 Overview of Noise Analysis Fundamentals 69

4.1 Fundamentals of random signals-time domain 69

4.1.1 Deterministic vs. stochastic signals 69

4.1.2 Expectation value and time average 71

4.1.3 Autocorrelation 73

4.1.4 Variance 79

4.1.5 Classes of random signals 81

4.2 Fundamentals of random signals-frequency domain 82

4.2.1 Fourier transform 82

4.2.2 Power spectrum of random signals 82

4.3 Circuit analysis with random voltages and currents 84

4.3.1 Time domain 84

4.3.2 Frequency domain 86

4.3.3 Measurement of p.s.d 88

4.4 Noise 89

4.4.1 Types and classification of noise 89

4.4.2 Representation of noise 92

4.5 Noise in oscillators 92

4.5.1 Time domain-jitter 93

4.5.2 Frequency domain - phase noise 94

4.6 Chapter summary 96

Appendix 4A Non-ergodic processes 98

Appendix 4B Exponentials with gaussian distributed exponents 99

Appendix 4C Fourier transform pairs 100

5 Measurement Techniques 101

5.1 Theoretical development 101

5.1.1 Case (i): Frequency domain, VCO open loop 101

5.1.2 Case (ii): Frequency domain, PLL closed loop 102

5.1.3 Case (iii): Time domain, closed loop, transmit clock referenced 102

5.1.4 Case (iv): Time domain, closed loop, self-referenced 103

5.1.5 Case (v): Time domain, open loop, self-referenced 103

5.2 Instrumentation 106

5.2.1 Time domain measurement instruments 106

5.2.2 Frequency domain instrumentation 112

5.2.3 Instrumentation summary 112

5.3 Experimental verification 113

5.3.1 PLL with multivibrator VCO 113

5.3.2 Ring VCO 118

5.3.3 Discussion of results 118

5.4 Chapter summary 120

Appendix 5A Analysis of jitter process 121

Appendix 5B Data acquisition techniques 123

6 Analysis of jitter in ring oscillators 129

6.1 Review of jitter analysis in different types of oscillators 129

6.1.1 Harmonic oscillators 129

6.1.2 Relaxation oscillators 132

6.1.3 Ring oscillator 136

6.2 Jitter model theoretical development 137

6.2.1 Time domain approach: jitter in each oscillator period 138

6.2.2 Special case I: independent delay errors give 1/f2 spectrum 140

6.2.3 Special case II: correlated delay errors 143

6.2.4 General case 146

6.2.5 Development in terms of gate delays 148

6.3 Methodology: applying model to circuit design 150

6.4 Experimental verification 151

6.5 Chapter summary 155

Appendix 6A Stationarity of two-sample variance 156

Appendix 6B Variance of clock period errors 157

7 Sources of jitter in ring oscillators 161

7.1 Introduction 161

7.1.1 Classification of jitter sources 161

7.1.2 Strategy 164

7.2 Control Path: system-level sources of noise 166

7.3 Load element noise 167

7.3.1 Fully differential case 167

7.3.2 Single ended case 171

7.3.3 Comparison of differential, single-ended K expressions 174

7.4 Switching element noise 175

7.4.1 Fully differential case 175

7.4.2 Single ended case 189

7.4.3 Comparison with other jitter sources 196

7.4.4 Variation in $$ with tuning 196

7.5 Bias element noise 199

7.5.1 Fully differential case: tail current noise 199

7.5.2 Comparison with other jitter sources 203

7.6 Summary of noise contributions 204

7.7 Experimental Verification 208

7.7.1 Simulation 208

7.7.2 Hardware tests 214

7.8 Comparison with jitter in harmonic oscillator 220

7.8.1 Time domain approach 220

7.8.2 Frequency domain approach 221

7.9 Chapter summary 223

Appendix 7A Differential pair switching delay 224

Appendix 7B Time-domain (transient) noise source simulation 227

8 Design methodology 231

8.1 Implications for design and simulation 231

8.2 Methodology Overview 233

8.2.1 Step 1: refer design goal to asymptotic K 233

8.2.2 Step 2: adjust asymptotic K to gate-level K 234

8.2.3 Step 3: determine constraints on the design of the individual gate 234

8.2.4 Step 4: design for ring center frequency 235

8.3 General design techniques for low jitter 237

8.4 Chapter summary 237

9 Low jitter VCO design examples 239

9.1 CMOS single-ended ring oscillator 239

9.1.1 VCO topology 239

9.1.2 Number of stages 240

9.1.3 Oscillation frequency 241

9.1.4 Frequency tuning 242

9.1.5 Jitter minimization - long channel 244

9.1.6 Jitter minimization - short channel 245

9.1.7 Experimental results 245

9.2 Bipolar differential ring oscillator 247

9.2.1 VCO requirements 247

9.3 Ring oscillator design 249

9.3.1 Experimental results 257

9.4 Chapter summary 264

Index 275

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