Designing an FPGA Chess Engine

Designing an FPGA Chess Engine

by Terry Loesch
Designing an FPGA Chess Engine

Designing an FPGA Chess Engine

by Terry Loesch

Paperback

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Overview

Designing an FPGA Chess Engine is an invaluable resource for understanding the building blocks for developing a fast, efficient and parallelized chess search engine which can achieve up to 30 million position evaluations per second. The book includes designs, data structures, state diagrams, and numerous examples which enables the developer to quickly become proficient with the design and development.

This book contains a short primer on both FPGA's and computerize chess to be used as reference for the remaining chapters which cover the design of an actual FPGA chess engine.

This book covers the following:

  • Designing a Chess engine that utilizes the unique properties of an FPGA
  • Utilizing parallelization to improve performance of move generation and evaluation
  • Parallelizing a chess search engine
  • Process control for parallelized searches
  • Coding example of critical components of move generation and evaluation

Product Details

ISBN-13: 9781668591635
Publisher: Barnes & Noble Press
Publication date: 10/28/2021
Pages: 160
Sales rank: 640,885
Product dimensions: 6.00(w) x 9.00(h) x 0.34(d)

About the Author

Terry has a Bachelor degree in Computer Science with emphases in Operating Systems, and a Master’s degree in Computer Science with emphases in Systems and Languages and Artificial Intelligence. He has more than thirty years’ experience in the industry working in application development, database management, and infrastructure. He became interested in FPGA technology due to its ability to run hundreds to thousands of parallel processes on a single chip. FPGAs are unique in this respect unlike Complex Instruction Set Computer (CISC) or Reduced Instruction Set Computer (RISC) based processors which can only run up to two processes per core.

In retirement, one of Terry’s hobbies is computerized chess and he has implemented a 4-way parallel search engine on a Xilinx, Inc (Xilinx) Kintex UltraScale KU040 development board. Each parallel search engine utilizes 800 concurrent processes to provide a total throughput of up to 30 million evaluated positions per second.
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