Designing Network On-Chip Architectures in the Nanoscale Era

by Jose Flich (Editor), Davide Bertozzi (Editor)

Overview

Going beyond isolated research ideas and design experiences, Designing Network On-Chip Architectures in the Nanoscale Era covers the foundations and design methods of network on-chip (NoC) technology. The contributors draw on their own lessons learned to provide strong practical guidance on various design issues.Exploring the design process of the

Product Details

ISBN-13:	9781040196144
Publisher:	CRC Press
Publication date:	12/18/2010
Sold by:	Barnes & Noble
Format:	eBook
Pages:	528
File size:	19 MB
Note:	This product may take a few minutes to download.

About the Author

Jose Flich is an associate professor of computer architecture and technology at the Technical University of Valencia. Dr. Flich is the coordinator of the EU-funded NaNoC project; co-chair of the CAC, CASS, and INA-OCMC workshops; and co-developer of RECN, the only truly scalable congestion management technique proposed to date. He is also associate editor of the IEEE Transactions on Parallel and Distributed Systems. His research interests include high-performance interconnection networks for multiprocessor systems, clusters of workstations, and networks on-chip.

Davide Bertozzi is an assistant professor and leader of the Multi-Processor Systems-On-Chip research group at the University of Ferrara. Dr. Bertozzi is the general chair of the INA-OCMC workshop and an editorial board member of IET Computers & Digital Techniques. His research interests encompass multi-core digital integrated systems, with an emphasis on all aspects of system interconnect design.

Table of Contents

NoC Technology. The Industrial Perspective. Upcoming Trends. Appendix. Bibliography.

Editorial Reviews

... a timely and welcome addition to the wide spectrum of available NoC literature ... above and beyond a simple overview of research ideas and/or design experiences. The book covers in-depth architectural and implementation concepts and gives clear guidelines on how to design the key network components. ... [it] teaches some hard lessons from the design trenches. In addition, the book covers some of the hottest upcoming research and development trends, such as vertical integration and variation-tolerant design. The editors put enormous effort in orchestrating the content for uniformity and in minimizing overlaps between chapters, while maintaining a solid logical flow. ... a much needed 'how-to' guide and an ideal stepping stone for the next ten years of NoC evolution.
—From the Foreword by Luca Benini, Universityà di Bologna and STMicroelectronics, Italy

From the Publisher