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Today's new data communication and computer interconnection systems run at unprecedented speeds, presenting new challenges not only in the design, but also in troubleshooting, test, and measurement. This book assembles contributions from practitioners at top test and measurement companies, component manufacturers,and universities. It brings together information that has never been broadly...
Today's new data communication and computer interconnection systems run at unprecedented speeds, presenting new challenges not only in the design, but also in troubleshooting, test, and measurement. This book assembles contributions from practitioners at top test and measurement companies, component manufacturers,and universities. It brings together information that has never been broadly accessible before—information that was previously buried in application notes, seminar and conference presentations, short courses, and unpublished works.
Readers will gain a thorough understanding of the inner workings of digital high-speed systems, and learn how the different aspects of such systems can be tested. The editors and contributors cover key areas in test and measurement of transmitters (digital waveform and jitter analysis and bit error ratio), receivers (sensitivity, jitter tolerance, and PLL/CDR characterization), and high-speed channel characterization (in time and frequency domain). Extensive illustrations are provided throughout.
1.1 Introduction 2
1.2 System Architectures 2
1.3 Line Coding of Digital Signals 12
1.4 Electrical Signaling 23
1.5 Summary 26
1.6 References 26
Chapter 2 Jitter Basics 29
2.1 Definition of Jitter 29
2.2 Jitter as a Statistical Phenomenon34
2.3 Total Jitter and Its Subcomponents 38
2.4 Analytical Solutions for Jitter Mixtures 42
2.5 The Dual Dirac Model 52
2.6 Summary 58
2.7 References 59
Chapter 3 Serial Communication Systems and Modulation Codes 61
3.1 Introduction 62
3.2 Encoders and Modulation Code Examples 68
3.3 Telephone System History and Evolution 89
3.4 SONET Design Requirements 107
3.5 Measuring the Band-Pass Response 112
3.6 Jitter 114
3.7 Measuring Power Supply Noise Immunity 120
3.8 Power Supply Distribution, Grounding, and Shielding 123
3.9 Measuring SONET Jitter 124
3.10 Modulation Codes for the Last Mile 140
3.11 Gigabit Ethernet 149
3.12 Summary 163
3.13 References 164
Chapter 4 Bit Error Ratio Testing 169
4.1 Basics of Bit Error Ratio Testing 170
4.2 Bit Error Ratio Statistics 178
4.3 Advanced BER Measurement Topics 192
4.4 Summary 193
4.5 References 193
Chapter 5 BERT Scan Measurements 195
5.1 Basics of BERT Scan Measurements 195
5.2 Sample Delay Scan 200
5.3 Sample Threshold Scan 226
5.4 Full Eye Scan 228
5.5 Spectral Jitter Decomposition 238
5.6 Summary 241
5.7 References 242
Chapter 6 Waveform Analysis--Real-Time Scopes 243
6.1 Principles of Operation of Real-Time Digital Oscilloscopes 245
6.2 Eye Diagram Analysis on Real-Time Instruments 258
6.3 Methods of Analyzing Individual Jitter Components 279
6.4 Analysis of Composite Jitter 299
6.5 Measurement Procedures 302
6.6 Interpreting Jitter Measurement Results 315
6.7 Summary 325
6.8 References 327
Chapter 7 Characterizing High-Speed Digital Communications Signals and Systems with the Equivalent-Time Sampling Oscilloscope 329
7.1 Sampling Oscilloscope Basics 330
7.2 Triggering the Oscilloscope 330
7.3 Oscilloscope Bandwidth and Sample Rate 331
7.4 Waveform Acquisition Process for the Sampling Oscilloscope 335
7.5 Sources of Instrumentation Noise 346
7.6 Parametric Analysis of Waveforms 350
7.7 The Effect of Oscilloscope Bandwidth on Waveform Results 353
7.8 Measurements of the Eye Diagram 358
7.9 Return-to-Zero Signals 382
7.10 Advanced Jitter Analysis 387
7.11 Summary 417
7.12 References 418
Chapter 8 High-Speed Waveform Analysis Using All-Optical Sampling 421
8.1 Introduction 422
8.2 Principles of Optical Sampling 427
8.3 Performance Measures of All-Optical Sampling Systems 441
8.4 Timebase Designs 464
8.5 Experimental Implementation and Key Building Blocks 475
8.6 Related Applications and Possible Future Directions 492
8.7 Summary 498
8.8 References 499
Chapter 9 Clock Synthesis, Phase Locked Loops, and Clock Recovery 505
9.1 Oscillators and Phase Noise 506
9.2 Phase Locked Loops and Clock Synthesis 510
9.3 Clock Data Recovery Circuits 512
9.4 PLL and Clock Recovery Dynamic Behavior 517
9.5 Measuring PLL Dynamics 523
9.6 Measuring Phase Noise and Jitter Spectrum 525
9.7 Summary 531
9.8 References 532
Chapter 10 Jitter Tolerance Testing 533
10.1 Introduction 533
10.2 Jitter Tolerance: Basic Measurement Method and Test Setup 536
10.3 Generation of Jitter Tolerance Test Signals 539
10.4 Jitter Tolerance Measurement Method and Test Setup 555
10.5 Summary 560
10.6 References 560
Chapter 11 Sensitivity Testing in Optical Digital Communications 563
11.1 Introduction: Optical Digital Receivers 564
11.2 The Basics of Optical Sensitivity Measurements 565
11.3 BER Calculations in Real Communications Systems 588
11.4 Summary 602
11.5 References 603
Chapter 12 Stress Tests in High-Speed Serial Links 605
12.1 The Need for High-Speed Serial Communication 606
12.2 Early High-Speed Optical Stressed-Eye Tests 607
12.3 BER versus OSNR 609
12.4 10 Gigabit Ethernet: IEEE 802.3ae 618
12.5 The Advent of Electronic Dispersion Compensation 629
12.6 LRM Stress Testing (IEEE 802.3aq) 634
12.7 Future Standards 641
12.8 Summary 654
12.9 References 655
Chapter 13 Measurements on Interconnects 657
13.1 Measurements and Characterization of Interconnects 658
13.2 Modeling of System Performance from Measurements 689
13.3 Summary 709
13.4 References 710
Chapter 14 Frequency Domain Measurements 713
14.1 Introduction 714
14.2 Understanding Network Analyzer Hardware 716
14.3 Understanding S-Parameters 729
14.4 Error Correction and Calibration Methods 740
14.5 Graphical Representations 749
14.6 Example Devices 758
14.7 Summary 783
14.8 References 783
Chapter 15 Jitter and Signaling Testing for Chip-to-Chip Link Components and Systems 785
15.1 Introduction 785
15.2 Multiple Gigabit per Second Computer Chip-to-Chip I/O Link Architectures 788
15.3 Chip-to-Chip Link System BER and Signaling Tests 800
15.4 Testing Examples 811
15.5 Future Technology Trends for High-Speed Links 815
15.6 Summary 817
15.7 References 817
Appendix A Pseudo-Random Binary Sequences 819 Appendix B Passive Elements for Test Setups 835 Appendix C Coaxial Cables and Connectors 847 Appendix D Supplemental Materials for Chapter 3 861 Index 911
Purpose of the Book
An example of a digital communications link is an integrated circuit (IC) sending binary-level data to another receiving IC through a microstrip transmission line trace in an FR4 printed circuit board environment. At low data rates that do not challenge the performance edge of communication components, designs are robust. At data rates of 10 Gbit/s (now common in the industry), interrelated design issues in the transmitter, the communication channel, and the receiver become more pronounced.
The engineering design effort in the area of high-speed digital links has been extensive. A field called signal integrity has been identified to help high-speed digital designers understand high-frequency design issues. The ultimate goal is to require fewer design cycles during product development. There are many excellent books in the area of signal integrity for digital communications systems (see the References section in Chapter 1 for a listing of recommended books). This book tackles one important subset of this broad signal integrity field: test and measurement techniques, especially for very high speed systems. It focuses on descriptions of test instrumentation hardware, theory of operation, and applications to digital communications links. The topic of jitter in digital systems is covered extensively.
The primary topics for high-speed physical layer characterization are the following:
It became clear to the authors of this book that there was not a good single source of reference information on the topic of digital communications test and measurement for the physical layer, and thus this book came into existence. The work combines the collective experience of authors from leading test and measurement organizations (Agilent, Circadiant, and Tektronix), component manufacturers, and university settings. The material in this book has been developed from application notes, seminars, conference presentations, short courses, and unpublished works from the last ten years. Test and measurement equipment companies as well as semiconductor manufacturers and even standards committees are producing a steady stream of application notes on selected high-speed digital test and measurement topics. These notes are often product oriented, and one must draw from a large number of sources to piece together a cohesive coverage of the topic. Much of the material has not had wide circulation to date. A trusted reference has been missing, and this work intends to fill this gap. This book takes the expertise gathered by test and measurement authors that was previously scattered in many places and puts it under a single cover.
This book will be useful for technicians, engineers, and scientists who are involved in the digital communications industry or need to learn about it. The book is designed to address the needs of people new to the field and those intimately familiar with it. Digital communications engineers and technicians spend a good fraction of their lives characterizing their system, subsystem, and component performance. This book serves as a reference that adds cohesion to the wide range of topics that must be understood to succeed in system characterization.
The coverage emphasizes an understanding of how the digital system works, how the test and measurement system is connected, and how an instrument does its job. Understanding instrument architectures and operation gives additional insight on limitations and flexibility of the measurements that can be performed. The book also provides insight into the characteristics of the devices under test. Illustrations are intentionally numerous because the authors believe that visual communication of information is how many people receive information most efficiently.Organization of Contents
The book is organized around the architecture of a simple digital communications link consisting of a transmitter, a receiver, and a channel. Chapters 1-3 give an introduction that provides background needed to understand later chapters in the book. Chapters 4-8 cover transmitter testing, Chapters 9-12 cover receiver testing, and Chapters 13-15 address characterization of the communication channel and internal computer communications links.Introduction Chapters
Chapters 1-3 provide a general introduction to digital communications and digital communications systems. These chapters offer a series of definitions, concept descriptions, and specific examples of digital communications link topics. They serve as a foundation for understanding the test and measurement chapters that follow.
Chapter 1 (general introduction): This chapter gives an overview of high-speed digital communications systems. The goal is to set a framework for the more detailed chapters that follow. This chapter also introduces terminology used in the rest of the book.
Chapter 2 (jitter introduction): Jitter is a pressing design problem in high-speed systems. This topic has also seen a large development effort by test and measurement companies in the last five years. Jitter is an extensive subject area and deserves its own introduction.
Chapter 3 (communications link examples): This chapter provides specific discussions on selected serial digital communications links. One often needs to understand some detail of the higher-level system definition and performance even when testing is done on the physical layer.Transmitter Characterization Chapters
Chapters 4-8 address the characterization of the transmitter portion of a digital communications link.
Chapter 4 (bit error ratio testing): A fundamental property of a digital communications link is the bit error ratio (BER), which is the number of bit errors divided by the total number of bits sent. This chapter along with Appendix A provides a detailed description of the test hardware and test methodology for BER.
Chapter 5 (bit error ratio scanning): This chapter describes techniques to find the system bit error ratio as a function of the digital decision threshold settings in time and voltage. One can obtain information on the signal-to-noise margin that is present in a digital link by scanning the decision thresholds. This can be very time consuming, and considerable discussion is given on performing measurement scans in a reasonable time period.
Chapter 6 (real-time oscilloscopes): This chapter covers high-speed waveform measurements based on real-time oscilloscope architectures. Here very fast analog-to-digital converters (now up to 40 GSamples/s) provide time snapshots of digital waveform segments. Advanced jitter measurement capabilities are described in detail.
Chapter 7 (equivalent-time sampling oscilloscopes): Very high speed waveforms can be reconstructed by a sampling process where data points are taken less frequently compared to real-time oscilloscopes. The sampling architectures and unique instrument capabilities are discussed in detail in this chapter. Finally, applications in digital waveform analysis and jitter component decomposition are given.
Chapter 8 (all-optical sampling oscilloscopes): This chapter departs from the earlier ones in that it concentrates on forward-looking optical sampling techniques that will allow viewing of high-speed optical signals such as 40 Gbit/s data streams with high sensitivity and waveform fidelity. Test and measurement equipment with several hundred gigahertz of bandwidth is now becoming available.Receiver Characterization Chapters
Chapters 9-12 highlight concepts and measurements for the receiver in a digital communications link.
Chapter 9 (digital clocks, clock recovery, and phase locked loops): This chapter first outlines the characteristics of oscillators used as reference clocks in digital systems. It then analyzes clock recovery circuits using phase locked loops. Finally, this chapter gives the critical measurement parameters used to characterize clock recovery circuits.
Chapter 10 (receiver jitter tolerance characterization): This chapter covers the basic hardware, test methods, and setup for characterizing the jitter tolerance performance for receivers.
Chapter 11 (digital optical receiver sensitivity testing): This chapter develops topics related to the testing of digital optical receivers. It addresses uncertainty values in the bit error ratio measurement and gives data-plotting strategies.
Chapter 12 (stressed receiver testing): Standards groups have specified that receivers be tested with controlled signal degradations. This stressed testing method allows the receiver to be characterized in a more realistic signal environment.Channel and System Characterization Chapters
Chapters 13 and 14 highlight test techniques for the interconnecting transmission line structures for digital links. Both frequency domain and time domain characterization techniques are given. Chapter 15 covers the specific topic of link characterization for internal computer communication functions.
Chapter 13 (time domain reflectometry TDR and time domain transmission TDT): This chapter covers time domain methods for characterizing the propagation of a signal from the transmitter to the receiver. Step-by-step analysis techniques are given to interpret TDR/TDT displays. Advanced measurement software can also be used to create a discontinuity model for the channel.
Chapter 14 (frequency domain measurements): Frequency domain techniques can be used to obtain the same information as traditional TDRs/TDTs with several other modes of operation. This method is contrasted against the direct time domain measurements discussed in Chapter 13. Several examples of measurement applications are given.
Chapter 15 (communications links inside the PC computer architecture): This chapter outlines operation and test strategies for PCI Express, SATA, and FBDIMM communications links internal to the computer.Appendixes
Appendix A covers the topic of pseudo-random binary sequences (PRBSs) in detail. Appendix B outlines several connector types used in high-frequency testing. Appendix C covers several accessory components that are often used in high-speed digital testing. Appendix D gives very detailed coverage for topics introduced in Chapter 3.Final Comments
As you browse through the book, we anticipate that you will find graphics that will draw you into several sections of the book's discussion. Many of the test and measurement issues discussed in this book are a direct result of Gb/s signals being routed around systems in less than ideal signal environments. It is still hard to believe that digital designs with 10 Gbit/s circuitry are being fabricated on FR4 printed circuit boards with good success. The on-off signal waveforms are digital in nature, but it is quite easy to have these transmitted bits become nearly unrecognizable at the receiver. The authors have strived to provide a valuable reference in high-speed physical layer characterization of these digital signals.
Dennis Derickson, editor
Marcus Müller, editor