Digital Design and Computer Organization / Edition 1

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Overview

Digital Design and Computer Organization introduces digital design as it applies to the creation of computer systems. It summarizes the tools of logic design and their mathematical basis, along with in depth coverage of combinational and sequential circuits.

The book includes an accompanying CD that includes the majority of circuits highlighted in the text, delivering you hands-on experience in the simulation and observation of circuit functionality. These circuits were designed and tested with a user-friendly Electronics Workbench package (Multisim Textbook Edition) that enables your progression from truth tables onward to more complex designs.

This volume differs from traditional digital design texts by providing a complete design of an AC-based CPU, allowing you to apply digital design directly to computer architecture. The book makes minimal reference to electrical properties and is vendor independent, allowing emphasis on the general design principles.

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Product Details

  • ISBN-13: 9780849311918
  • Publisher: CRC Press
  • Publication date: 2/1/2003
  • Edition description: New Edition
  • Edition number: 1
  • Pages: 512
  • Sales rank: 564,529
  • Product dimensions: 6.30 (w) x 9.40 (h) x 1.40 (d)

Table of Contents

NUMBERS IN DIFFERENT BASES
Digital and Analog Data
Coding
Positional Number System
Octal and Hexadecimal Bases
Operands Types and Their Range
Conversion of Decimal Numbers to Equivalent Numbers in
Arbitrary Bases
Binary Arithmetic
Radix and Diminished Radix Complements
Representation of Negative Numbers
Coding and Binary Codes
Floating-Point Numbers
Chapter 1 Exercises

Boolean Algebra, and Gate and Transistor Design
Boolean or Switching Algebra
Properties of Boolean Algebra
Simplification of Boolean Expressions
Boolean Function
Circuit Analysis and Gate Design
Electrical Circuits
Kirchhoff's Laws and Voltage Division
Kirchhoff's Current Law
RC Circuits
Transistors and Logic Gates
CMOS Gate Design
Chapter 2 Exercises

CANONICAL FORMS AND LOGICAL COMPLETENESS
Canonical Forms of Boolean Functions
Sum of Product and Product of Sum Forms
Design of Functions in Standard Forms
Other Two Variable Functions
Logical Completeness
NAND and NOR Design of Combinational Circuits
Design Automation Tools and Levels of Abstraction
Application to the Electronics Workbench (EW)
Integrated Circuits
Chapter 3 Exercises

MINIMIZATION OF BOOLEAN FUNCTIONS
Logical Adjacencies and K-Map Construction
Subcube Formations
K-Map Minimization
Incompletely Specified Functions
Product of Sum Minimization
The Quine-McCluskey or Tabular Method
Multiple-Output Function Minimization
Chapter 4 Exercises

ARITHMETIC LOGIC CIRCUITS AND PROGRAMMABLE LOGIC DEVICES
Binary Adders
Look-Ahead Carry Generators
Magnitude Comparators
Binary Subtractors
Arithmetic Circuits Using Radix Complement
Multiplier Circuits
Multiplexers
Design of a Simple Arithmetic Logic Unit
Chapter 5 Exercises

PROGRAMMABLE LOGIC DEVICES
Decoders
Encoders
Multiplexers
Demultiplexers
Programmable Logic Arrays
Programmable Array Logic Devices
Read-Only Memory
Diodes and Programmable Logic Devices
Chapter 6 Exercises

FLIP-FLOPS AND ANALYSIS OF SEQUENTIAL CIRCUITS
Latches
Behavioral Description
Other Primitive Latches
The Latches Gate Design
Gated Latches
Flip-Flops
Glitches and Ones-Catching
Edge-Triggered Flip-Flops
Block Diagrams and Timing Constraints
Analysis of Sequential Circuits
Chapter 7 Exercises

DESIGN OF SEQUENTIAL CIRCUITS AND STATE MINIMIZATION
Block Diagrams and Design from Excitation Equations
Design Given the Characteristic Equations
General Design Procedure of Sequential Circuits
Machine Equivalence and State Assignments
Mealy State Diagrams
Moore Machines
Machine and State Equivalence
State Reduction and Minimal State Diagrams
Chapter 8 Exercises

REGISTERS, COUNTERS, AND MEMORY ELEMENTS
Registers
Counters
Asynchronous, Ring, and Johnson Counters
General-Purpose Register-Counter Circuits
Memory Block Diagram
Building Larger RAM from Smaller RAM
The Data Bus Connections
Internal Design of Memory
Register Files
Chapter 9 Exercises

INSTRUCTION SET ARCHITECTURE
Instruction Set of a Computer
Accumulator-Based Instruction Set Architecture
General Register-Based Architecture
Machine-Level Instructions
The Computer Instruction Cycles
Common Addressing Modes
Macros
Chapter 10 Exercises

DESIGN OF A SIMPLE AC-BASED CPU
Microoperation and Register Transfer Languages
Design of RTL Statements
Instruction Set of the Simple CPU
CPU Organization Data Path
The Control Unit
The Three Cycles
Computer Cycles Execute Microoperations
Inputs and Outputs of the Combinational Part of Control Unit
The Control Unit Output Functions
Design of the AC-Based CPU
Chapter 11 Exercises

Appendix A References

Appendix B Answers to Selected Problems

Index

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