Domain-Specific Processors: Systems, Architectures, Modeling and Simulation(Signal Processing and Communications Series)by Shuvra S. Bhattacharyya
Pub. Date: 11/11/2003
Publisher: Taylor & Francis
Assessment runs from realizations of the extended linearization model to optimization for piecewise regular processor arrays. Emphasizes efficiency in discussions of scalable parallel-pipelined and compiled regular architectures. Also covers single chip multiprocessing for consumer electronics. See more details below
Assessment runs from realizations of the extended linearization model to optimization for piecewise regular processor arrays. Emphasizes efficiency in discussions of scalable parallel-pipelined and compiled regular architectures. Also covers single chip multiprocessing for consumer electronics.
Table of Contents
Automatic VHDL Model Generation of Parameterized FIR Filters, E.George Walters III, John Glossner, Michael J. Schulte; An LUT-Based High Level Synthesis Framework for Reconfigurable Architectures Lo c Lagadec, Bernard Pottier, and Oscar Villellas-Guillen; Highly Efficient Scalable Parallel-Pipelined Architectures for Discrete Wavelet Transforms David Guevorkian, Petri Liuha, Aki Launiainen and Ville Lappalainen; Stride Permutation Access in Interleaved Memory Systems, Jarmo Takala and Tuomas Jarvinen; Modelling of Intra-task Parallelism in Task-level Parallel Embedded Systems, Andy D. Pimentel, Frank P. Terpstra, Simon Polstra and Joe E. Coffland; Energy Estimation and Optimization for Piecewise Regular Processor Arrays, Frank Hannig and, Juergen Teich; Automatic Synthesis of Efficient Interfaces for Compiled Regular Architectures, Steven Derrien, Anne-Claire Quillou, Patrice Quinton, Tanguy Risset and Charles Wagner; Goal-Driven Reconfiguration of Polymorphous Architectures, Sumit Lohani and Shuvra S. Bhattacharyya; Realizations of the Extended Linearization Model, Alexandru Turjan, Bart Kienhuis, Ed Deprettere; Communication Services for Networks on Chip, Andrei Radulescu and Kees Goossens; Single chip Multiprocessing for Consumer Electronics, Paul Stravers and Jan Hoogerbugge; Future Directions of (Programmable and Reconfigurable) Embedded Processors, Stephan Wong, Stamatis Vassiliadis, Sorin Cotofana.
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