ESD: Circuits and Devices / Edition 1

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The scaling of semiconductor devices from sub-micron to nanometer dimensions is driving the need for understanding the design of electrostatic discharge (ESD) circuits, and the response of these integrated circuits (IC) to ESD phenomena.

ESD Circuits and Devices provides a clear insight into the layout and design of circuitry for protection against electrical overstress (EOS) and ESD.  With an emphasis on examples, this text:

  • explains ESD buffering, ballasting, current distribution, design segmentation, feedback, coupling, and de-coupling ESD design methods;
  • outlines the fundamental analytical models and experimental results for the ESD design of MOSFETs and diode semiconductor device elements, with a focus on CMOS, silicon on insulator (SOI), and Silicon Germanium (SiGe) technology;
  • focuses on the ESD design, optimization, integration and synthesis of these elements and concepts into ESD networks, as well as applying within the off-chip driver networks, and on-chip receivers; and
  • highlights state-of-the-art ESD input circuits, as well as ESD power clamps networks.

Continuing the author’s series of books on ESD, this book will be an invaluable reference for the professional semiconductor chip and system ESD engineer.  Semiconductor device and process development, quality, reliability and failure analysis engineers will also find it an essential tool.  In addition, both senior undergraduate and graduate students in microelectronics and IC design will find its numerous examples useful.

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Product Details

  • ISBN-13: 9780470847541
  • Publisher: Wiley
  • Publication date: 1/6/2006
  • Edition number: 1
  • Pages: 412
  • Sales rank: 845,170
  • Product dimensions: 6.97 (w) x 9.94 (h) x 1.11 (d)

Meet the Author

Dr. Steven H. Voldman received his B. S. in Engineering Science from the University of Buffalo (1979); M.S. EE (1981) and Electrical Engineer Degree (1982) from M.I.T.; MS Engineering Physics (1986) and Ph.D. EE (1991) from the University of Vermont under IBM Resident Study Fellow program. At M.I.T., he worked as a member of the M.I.T. Plasma Fusion center, and the High Voltage Research Laboratory (HVRL). At IBM, as a reliability/device engineer, his work included pioneering work in bipolar/CMOS SRAM alpha particle and cosmic ray SER simulation, MOSFET gate-induced drain leakage (GIDL) mechanism, hot electron, epitaxy/well design, CMOS latchup, and ESD. Since 1986, he was responsible for defining the IBM ESD/latchup strategy for CMOS, SOI, BiCMOS and RF CMOS, and SiGe technologies. He has authored ESD and latchup publications in the area of MOSFET scaling, device simulation, copper, low-k, MR heads, CMOS, SOI, SiGe and SiGeC technology. Voldman served as SEMATECH ESD Working Group Chairman (1996–2000), ESD Association Technical Program Chair (2000), Vice Chairman (2001), General Chairman 2002, and ESDA Board of Directors (1998–2006), International Reliability Physics Symposium ESD/Latchup Sub-Committee Chairman (2002–2006), International Physical and Failure Analysis (IPFA) Symposium ESD Sub-Committee Chairman (2003–2005), ESD Association Standard Development Chairman on Transmission Line Pulse Testing (2000–2006), ESD International Committee on Education (ICE) Asian University Liason and “ESD on Campus” program founder, and serves in the ISQED Committee, Taiwan ESD Conference (T-ESDC) Technical Program Committee (Hsinchu, Taiwan), and the International Conference on Electromagnetic Compability (ICEMAC, Taipei, Taiwan). Voldman has provided ESD lectures for universities (e.g., M.I.T. Lecture Series, Taiwan National Chiao-Tung University (NCTU), and Singapore Nanyang Technical University (NTU)). He is a recipient of over 136 U.S. patents, over 100 publications, and recently wrote a textbook on ESD entitled ESD: Physics and Devices (John Wiley and Sons, Ltd) as well as contributing to the text “Silicon Germanium: Modeling, Technology and Simulation,” and providing talks on patenting and invention. He has been highlighted in EE Times, Intellectual Property Law and Business and authored the first article on ESD phenomena for the October 2002 edition of Scientific American entitled “Lightning Rods for Nano-electronics,” and Pour La Science, Le Scienze, and Swiat Nauk International editions. In 2003, Dr. Voldman was accepted as the first IEEE Fellow for ESD phenomena in semiconductors for “contributions to electrostatic discharge protection in CMOS, SOI, and SiGe technologies.”

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Table of Contents

About the Author.



Chapter 1: Electrostatic Discharge.

1.1 Electricity and Electrostatics Discharge.

1.2 Fundamental Concepts of ESD Design.

1.3 Time Constants.

1.4 Capacitance, Resistance and Inductance and ESD.

1.5 Rules of Thumb and ESD.

1.6 Lumped versus Distributed Analysis and ESD.

1.7 ESD Metrics and Figures of Merit.

1.8 Twelve Steps to Building an ESD Strategy.

1.9 Summary and Closing Comments.



Chapter 2: Design Synthesis.

2.1 Synthesis and Architecture of a Semiconductor Chip for ESD Protection.

2.2 Electrical and Spatial Connectivity.

2.3 ESD, Latchup, and Noise.

2.4 Interface Circuits and ESD Elements.

2.5 ESD Power Clamps Networks.

2.6 ESD Rail-to-Rail Devices.

2.7 Guard Rings.

2.8 Pads, Floating Pads, and No Connect Pads.

2.9 Structures Under Bond Pads.

2.10 Summary and Closing Comments.



Chapter 3: Electrostatic Discharge (ESD) Design: MOSFET Design.

3.1 Basic ESD Design Concepts.

3.2 ESD MOSFET Design: Channel Width.

3.3 ESD MOSFET Design: Contact.

3.4 ESD MOSFET Design: Metal Distribution.

3.5 ESD MOSFET Design: Silicide Masking.

3.6 ESD MOSFET Design: Series Cascode Configurations.

3.7 ESD MOSFET Design: Multi-Finger Design Integration of Coupling and Ballasting Techniques.

3.8 ESD MOSFET Design: Enclosed Drain Design Practice.

3.9 ESD MOSFET Interconnect Ballasting Design.

3.10 ESD MOSFET Design: Source and Drain Segmentation.

3.11 Summary and Closing Comments.



Chapter 4: Electrostatic Discharge (ESD) Design: Diode Design.

4.1 ESD Diode Design: ESD Basic.

4.2 ESD Diode Design: Anode.

4.3 ESD Diode Design: Interconnect Wiring.

4.4 ESD Diode Design: Polysilicon-Bound Diode Designs.

4.5 ESD Diode Design: n-Well Diode Design.

4.6 ESD Diode Design: nþ/p Substrate Diode Design.

4.7 ESD Diode Design: Diode String.

4.8 ESD Diode Design: Triple-Well Diodes.

4.9 ESD Design: BiCMOS ESD Design.

4.10 Summary and Closing Comments.



Chapter 5: Silicon on Insulator (SOI) ESD Design.

5.1 SOI ESD Basic Concepts.

5.2 SOI ESD Design: MOSFET with Body Contact (T-Shaped Layout).

5.3 SOI ESD Design: SOI Lateral Diode Structure.

5.4 SOI ESD Design: Buried Resistors (BR) Elements.

5.5 SOI ESD Design: SOI Dynamic Threshold MOSFET (DTMOS).

5.6 SOI ESD Design: Dual-Gate (DG) MOSFETs.

5.7 SOI ESD Design: FinFET Structure.

5.8 SOI ESD Design: Structures in the Bulk Substrate.

5.9 SOI ESD Design: SOI-To-Bulk Contact Structures.

5.10 Summary and Closing Comments.



Chapter 6: Off-Chip Drivers (OCD) and ESD.

6.1 Off-Chip Drivers (OCD).

6.2 Off-Chip Drivers: Mixed-Voltage Interface.

6.3 Off-Chip Drivers Self-Bias Well OCD Networks.

6.4 Off-Chip Drivers: Programmable Impedance (PIMP) OCD Networks.

6.5 Off-Chip Drivers: Universal OCDs.

6.6 Off-Chip Drivers: Gate-Array OCD Design.

6.7 Off-Chip Drivers: Gate Modulated Networks.

6.8 Off-Chip Driver ESD Design: Integration of Coupling and Ballasting Techniques.

6.9 Off-Chip Driver ESD Design: Substrate-Modulated Resistor-Ballasted MOSFET.

6.10 Summary and Closing Comments.



Chapter 7: Receiver Circuits and ESD.

7.1 Receivers and ESD.

7.2 Receivers and ESD.

7.3 Receivers and Receiver Evolution.

7.4 Receiver Circuits with Pseudo-Zero VT Half-Pass Transmission Gates.

7.5 Receiver Circuits with Zero Transmission Gate.

7.6 Receiver Circuits with Bleed Transistors.

7.7 Receiver Circuits with Test Functions.

7.8 Receiver With Schmitt Trigger Feedback Networks.

7.9 Bipolar Transistor Receivers.

7.10 Summary and Closing Comments.



Chapter 8: SOI ESD Circuits and Design Integration.

8.1 SOI ESD Design Integration.

8.2 SOI ESD Design: Diode Design.

8.3 SOI ESD Diode Design: Mixed Voltage Interface (MVI) Environments.

8.4 SOI ESD Networks in SOI CPU with Aluminum (Al) Interconnects.

8.5 SOI ESD Design in Copper (Cu) Interconnects.

8.6 SOI ESD Design with Gate Circuitry.

8.7 SOI and Dynamic Threshold ESD Networks.

8.8 SOI Technology and Miscellaneous ESD Issues

8.9 Summary and Closing Comments.



Chapter 9: ESD Power Clamps.

9.1 ESD Power Clamp Design Practices.

9.2 ESD Power Clamps: Diode-Based.

9.3 ESD Power Clamps: MOSFET-Based.

9.4 ESD Power Clamps: Bipolar-Based.

9.5 ESD Power Clamps: Silicon Controlled Rectifier-Based.

9.6 Summary and Closing Comments.




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  • Posted February 20, 2011

    Highly recommended to circuit designers and students

    This is one of the best books on ESD. All the major ESD building blocks and issues are fully investigated and elegantly written. A perfect balance between circuit and device is an important feature of this book. This is the second book of this series and the author obviously devoted a tremendous amount of time and effort to the writing. The treatment is comprehensive enough to make this book the textbook for an ESD course. It's worth noting that the author is a world expert on ESD and integrated circuit technologies, and was named an IEEE fellow for his contributions in these areas. It's great that he shared lots of valuable knowledge, design experience and deep insights. Chapters 3 and 4 help readers quickly gain solid understanding of the two key elements in ESD design domain: MOSFET and diodes. The chapters on driver, receiver, and power clamp help complete the knowledge of ESD building blocks. All these chapters are written from circuit design perspective rather than pure device physics. Chapters focusing on SOI are a big plus. There are plenty of helpful illustrations in this book, and the perfect number of equations to enhance readers understanding. Please consider using this as your first book to read in ESD. You will keep referring to this book many years from now. Engineers with lots of experience would find this book very useful as well.

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  • Anonymous

    Posted January 24, 2008

    A very useful ESD book about ESD devices and circuits

    I have had this book for a while. This one is the second book of the author's ESD book series which cover the most comprehensive topics related to ESD protection comparing with other ESD books. It is one of the most recently published ESD books with new and updated date points and the latest developments in the field. The thing I like most is, just like the name (circuits and devices) of the book, it not only takes the ESD protection devices as topics to present all the ESD design issues, but also takes the circuit applications as topics to discuss the concerns of ESD design, which gives you the picture that only with good individual ESD protection devices, the successful full-chip ESD solution is not automatic. It is a useful book for both designers and device engineers. I always keep it at hand for my ESD design projects.

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  • Anonymous

    Posted January 18, 2008

    A reviewer

    This book, ESD: Circuits and Devices, is part of a 3-book series on Electrostatic Discharge (ESD) by the same author (Steven Voldman). One of the main strengths of this series (and there are very many) is that this is very recently published with new and updated datapoints, not to mention being the only series of ESD textbook. Essentially, this means that all the latest developments in the field is published in an easy-to-understand series. In this book, Voldman writes about the design of ESD protection circuits in his unique style which is illuminating both for experts and beginners alike. I highly recommend this book series to all students of integrated circuit design and ESD.

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