Fast Simulation of Computer Architectures

by Thomas M. Conte (Editor), Charles E. Gimarc (Editor)

Overview

Chapters in Fast Simulation of Computer Architectures cover topics such as how to collect traces, emulate instruction sets, simulate microprocessors using execution-driven techniques, evaluate memory hierarchies, apply statistical sampling to simulation, and how to augment simulation with performance bound models. The chapters have been written by many of the leading researchers in the area, in a collaboration that ensures that the material is both coherent and cohesive.
Audience: Of tremendous interest to practising computer architect designers seeking timely solutions to tough evaluation problems, and to advanced upper division undergraduate and graduate students of the field. Useful study aids are provided by the problems at the end of Chapters 2 through 8.

Product Details

ISBN-13:	9780792395935
Publisher:	Springer US
Publication date:	06/30/1995
Edition description:	1995
Pages:	244
Product dimensions:	6.10(w) x 9.25(h) x 0.24(d)

Table of Contents

1. Introduction; T. M. Conte, C. E. Gimarc. 2. SHADE: A Fast Instruction-Set Simulator for Execution Profiling; B. Cmelik, D. Keppel. 3. Instrumentation Tools; J. Pierce et al. 4. Stack-Based Single-Pass Cache Simulation; T. M. Conte. 5. Non-Stack Single-Pass Simulation; R. A. Sugumar, S. G. Abraham. 6. Execution Driven Simulation of Shared Memory Multiprocessors; B. Boothe. 7. Sampling for Cache and Processor Simulation; K. N. Menezes. 8. Performance Bounds for Rapid Computer System Evaluation; B. Mangione-Smith. Index.

Editorial Reviews

Describes fast, efficient, and sophisticated techniques for quantitatively evaluating computer architectures. Contributors from Hewlett-Packard, Sun Microsystems, Harvard, and other universities and corporations explain how to collect traces, emulate instruction sets, simulate multi-processors using execution-driven techniques, evaluate memory hierarchies, apply statistical sampling to simulation, and augment simulation with performance-bound models. Of interest to practicing computer architecture designers and to graduate and advanced undergraduates in the field. Suitable as an auxiliary text in a first or second semester computer architecture course. Annotation c. Book News, Inc., Portland, OR (booknews.com)

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