Field-Programmable Analog Arrays / Edition 1

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Overview

Field-Programmable Analog Arrays brings together in one place important contributions and up-to-date research results in this fast moving area.
Field-Programmable Analog Arrays serves as an excellent reference, providing insight into some of the most challenging research issues in the field.

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Editorial Reviews

Booknews
Comprising issue 17 of Analog Integrated Circuits and Signal Processing, nine articles focus on an emerging technology for which an application has yet to be found. An analog to field-programmable gate arrays, it falls somewhere between smart analog circuits and universal analog signal processors; it may someday be used for such systems as artificial neural networks, cellular neural networks, and silicon retinas and cochleas. The papers consider both discrete-time and continuous-time arrays, and discuss such aspects as design approaches, a novel switched-capacitor based architecture for the arrays, a current conveyor based version, a current-mode based version for signal processing applications, and the design and applications of a high-frequency version. No index. Annotation c. by Book News, Inc., Portland, Or.
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Product Details

  • ISBN-13: 9780792382324
  • Publisher: Springer US
  • Publication date: 10/31/1998
  • Edition description: Reprinted from ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 17:1-2, 1998
  • Edition number: 1
  • Pages: 169
  • Product dimensions: 10.00 (w) x 7.00 (h) x 0.44 (d)

Read an Excerpt


Chapter 2: Design Approaches

2.1. Analog Computers

In the 1960s analog computers were commonly used as hardware simulators in various areas of science and engineering. We describe a nuclear measurement system and a power system simulator based on systems of analog building blocks.

2.1.1. Arbel Nucleonic Computer.

One of the first published attempts at identifying standard analog building blocks that could be used to build reconfigurable analog signal processing systems is presented in [38]. The application, in the field of nuclear instrumentation, was signal conditioning and preprocessing of the current-output signal from a radiation detector, before digital signal processing by a computer.

Current was chosen as the signal parameter for this system. The building blocks included linear amplifiers, discriminators, ADCs, time-to-amplitude converters, linear gates and analog memory modules. Where necessary, parametric configuration was performed by using front-panel controls. The blocks were interconnected with coaxial cables that could be used (by appropriate choice of the cable length) as signal delay elements.

2.1.2. Power System Simulators.

Another early application of configurable analog circuits [39] sought to build a real-time simulator for power system studies, with a modular approach that would permit flexibility in configuring the parameters of the components and the topology of the system being modeled. To implement the simulator, circuit models of the power systems were created from differential equations in state variable form. The analog blocks used in the circuit implementation included integrators, linear amplifiers, non-linear elements, weighted summers and resistors. Power system components such as transformers, machines, transmission lines, filters and valves were modeled using this technique.

Simulation studies were performed to model HVDC transmission and inrush transients of transformers.

2.2. FPAA Related IC Approaches

In this subsection we discuss two IC implementation approaches related to FPAAs, namely metal-mask programmable analog arrays and analog standard cells.

2.2.1. Metal-mask Programmable Analog Arrays.

Metal-mask programmable gate arrays are widely used for short fab cycle-time, low-cost implementations of digital integrated circuits. The circuit being implemented is instantiated in a sea-of-gates (SOG) array using a custom set of metal-masks. In our discussion of field-programmable analog and mixedsignal arrays, metal-masked arrays are interesting as a related approach that seeks to define VLSI implementations of analog building blocks that can be used to build useful circuits. Metal-masked analog arrays are also important as an extension of the FPAA design flow as a smaller-area and lower-cost means of implementing, in high volume, circuits that have been verified using FPAAs/FPMAs. Such an extension is provided for IMP's family of EPAC integrated circuits [32].

Metal-masked array technology has long been in existence for bipolar designs [401. To provide the functions required by analog designs, these arrays tended to have small numbers of coarse granularity cells that were more complex than the fine granularity devices present in large numbers in digital arrays. Special function cells such as high power devices and voltage references were also common. Interesting in the context of mixed-signal designs is a dense array manufactured by Ferranti Interdesign [40] that packed analog cells around a digital array and in the spaces between bond pads. Another innovation in the field of bipolar arrays was pioneered by Exar [41]; which developed device layouts that could be customized as either npn or pnp transistors by the use of a metal mask. A 1991 U.S. patent [42] awarded to Plessey Overseas Ltd. describes a cell for a semi-custom array that could be instantiated as an npn or pnp transistor, a resistor or a diode by use of an appropriate metalmask. Recent work in bipolar analog arrays has resulted in a cell-based array for wireless applications [43] in the GHz range. The array is composed of RF and digital cells that are parameterized and interconnected using a metal mask.

Duchene et al. [44] evaluated the use of existing CMOS digital SOG arrays for implementing analog circuits, and proposed an extended CMOS array consisting of the conventional sea of gates, along with features particularly suited to mask-programmed implementations of analog circuits. An experimental study [44] found that analog circuits implemented in an SOG array with transistors built out of serial and parallel combinations of unit transistors exhibited a 10-50% degradation in performance for parameters such as gain-bandwidth product, offset voltage and phase margin when compared to full-custom IC implementations. The performance attained was found to be adequate for many applications. To further increase the performance of SOG array implementations of analog circuits, floating wells, bipolar transistors and highprecision, high-value resistors are required. An extended array proposed in (44] added to the SOG array an "analog field" containing a bank of resistors, lateral pnp transistors and matched p-channel diffpairs in isolated wells. Area-efficient mask-programmable dedicated-function blocks, in the form of high voltage (100V) output driver transistors, a bandgap reference and a low-power oscillator, were also included because of their high frequency of usage in analog circuits.

2.2.2. Analog Standard Cells.

Analog standard cell design methodologies are more challenging to implement than their digital counterparts. This is because of the wide variations in specifications, such as bandwidth and DC or AC levels of signals, for different instances of a given analog building block (e.g. an opamp) that are used in different circuits, or even within a single circuit. Analog standard cell design methodologies therefore require cells that can be reused in different applications. This requirement is similar to that of FPAAs, although the number of different CABs used in an FPAA is typically much smaller than the number of cells in an analog standard cell library. A 1994 U.S. patent [45] describes a scheme for creating standard cells by connecting circuits that perform different functions through a standard interface that sets signal parameters such as DC bias and peak to peak levels.

Certain specialized classes of analog circuits have used standard cell design approaches. A library of low voltage analog and digital cells, and high-voltage and mixed-voltage analog cells was used to implement a 60-V, 10-A intelligent power switch in a 3 µn analog CMOS process [46]. High voltage cells included charge pumps, level-shifters and protection circuits, mixed-voltage cells provided the sensing functions in the interface between the high voltage circuits and the low voltage analog and digital control circuitry.

Analog circuits for RF and microwave communication have also been implemented using a standard cell technology. Operating in the GHz frequency range, building blocks such as voltage controlled oscillators, power amplifiers and RF switches have been implemented in a 0.8 µm BiCMOS process [471. Especially interesting in the context of reconfigurable analog integrated circuits are the RF switches, which are typically used to share components such as filters, between the transmitter and receiver sections of a radio circuit [47]. The implementation of reusable building blocks, along with integrated circuit switches to connect them together will likely influence the development of field-programmable integrated circuits for these specialized applications.

3. Previous Work

Previous work in the area of programmable analog integrated circuits is dominated by programmable neural network ICs. Another more general approach is evident in circuit implementations of the multiplication of a signal vector by a matrix of coefficients. The first field-programmable analog arrays employed continuous-time subthreshold circuit techniques, using basic building blocks interconnected by transistor switches to implement prototyped circuits. A discrete-time approach to programmable analog circuits used controlled duty cycle chopping of signals followed by signal reconstruction to implement analog coefficient multiplication in z-domain filter circuits.

3.1. Programmable Neural Networks

Programmable neural networks are an important class of programmable analog circuits. A summary of important research and commercial works in the area...

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Table of Contents


Editorial
Introduction
Design Approaches to Field-Programmable Analog Integrated Circuits
A Novel Switched-Capacitor Based Field-Programmable Analog Array Architecture
A Switched Capacitor Approach to Field-Programmable Analog Array (FPAA) Design
DPAD2 -- A Field Programmable Analog Array
The EPAC Architecture: An Expert Cell Approach to Field Programmable Analog Devices
A Current Conveyer Based Field Programmable Analog Array
A Current Mode Based Field-Programmable Analog Array for Signal Processing Applications
A High-Frequency Field-Programmable Analog Array (FPAA) Part 1: Design
A High-Frequency Field-Programmable Analog Array (FPAA) Part 2: Applications
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