Field-Programmable Logic and Applications. From FPGAs to Computing Paradigm: 8th International Workshop, FPL'98 Tallinn, Estonia, August 31 - September 3, 1998 Proceedings

by Reiner W. Hartenstein (Editor), Andres Keevallik (Editor)

Overview

This book constitutes the refereed proceedings of the 8th International Workshop on Field-Programmable Logics and Applications, FPL '98, held in Tallinn, Estonia, in August/September 1998.
The 39 revised full papers presented were carefully selected for inclusion in the book from a total of 86 submissions. Also included are 30 refereed high-quality posters. The papers are organized in topical sections on design methods, general aspects, prototyping and simulation, development methods, accelerators, system architectures, hardware/software codesign, system development, algorithms on FPGAs, and applications.

Product Details

ISBN-13:	9783540649489
Publisher:	Springer Berlin Heidelberg
Publication date:	09/18/1998
Series:	Lecture Notes in Computer Science , #1482
Edition description:	1998
Pages:	539
Product dimensions:	6.10(w) x 9.25(h) x 0.04(d)

Table of Contents

New CAD framework extends simulation of dynamically reconfigurable logic.- Pebble: A language for parametrised and reconfigurable hardware design.- Integrated development environment for logic synthesis based on dynamically reconfigurable FPGAs.- Designing for Xilinx XC6200 FPGAs.- Perspectives of reconfigurable computing in research, industry and education.- Field-programmable logic: Catalyst for new computing paradigms.- Run-time management of dynamically reconfigurable designs.- Acceleration of satisfiability algorithms by reconfigurable hardware.- An optimized design flow for fast FPGA-based rapid prototyping.- A knowledge-based system for prototyping on FPGAs.- JVX — A rapid prototyping system based on Java and FPGAs.- Prototyping new ILP architectures using FPGAs.- CAD system for ASM and FSM synthesis.- Fast floorplanning for FPGAs.- SRAM-based FPGAs: A fault model for the configurable logic modules.- Reconfigurable hardware as shared resource in multipurpose computers.- Reconfigurable computer array: The bridge between high speed sensors and low speed computing.- A reconfigurable engine for real-time video processing.- An FPGA implementation of a magnetic bearing controller for mechatronic applications.- Exploiting contemporary memory techniques in reconfigurable accelerators.- Self modifying circuitry — A platform for tractable virtual circuitry.- REACT: Reactive environment for runtime reconfiguration.- Evaluation of the XC6200-series architecture for cryptographic applications.- An FPGA-based object recognition machine.- PCI-SCI prool translations: Applying microprogramming concepts to FPGAs.- Instruction-level parallelism for reconfigurable computing.- A hardware/software co-design environment for reconfigurable logic systems.- Mapping loops ontoreconfigurable architectures.- Speed optimization of the ALR circuit using an FPGA with embedded RAM: A design experience.- High-level synthesis for dynamically reconfigurable hardware/software systems.- Dynamic specialisation of XC6200 FPGAs by partial evaluation.- WebScope: A circuit debug tool.- Computing Goldbach partitions using pseudo-random bit generator operators on an FPGA systolic array.- Solving boolean satisfiability with dynamic hardware configurations.- Modular exponent realization on FPGAs.- Cost effective 2×2 inner product processors.- A field-programmable gate-array system for evolutionary computation.- A transmutable telecom system.- A survey of reconfigurable computing architectures.- A novel field programmable gate array architecture for high speed arithmetic processing.- Accelerating DTP with reconfigurable computing engines.- Hardware mapping of a parallel algorithm for matrix-vector multiplication overlapping communications and computations.- An interactive datasheet for the xilinx XC6200.- Fast adaptive image processing in FPGAs using stack filters.- Increasing microprocessor performance with tightly-coupled reconfigurable logic arrays.- A high-performance computing module for a low earth orbit satellite using reconfigurable logic.- Maestro-link: A high performance interconnect for PC cluster.- A hardware implementation of Constraint Satisfaction Problem based on new reconfigurante LSI architecture.- A hardware operating system for dynamic reconfiguration of FPGAs.- High speed low level image processing on FPGAs using distributed arithmetic.- A flexible implementation of high-performance FIR filters on Xilinx FPGAs.- Implementing processor arrays on FPGAs.- Reconfigurable hardware — A study in codesign.- Statechart-based HW/SW-codesign of amulti-FPGA-board and a microprocessor.- Simulation of ATM switches using dynamically reconfigurable FPGA's.- Fast prototyping using system emulators.- Space-efficient mapping of 2D-DCT onto dynamically configurable coarse-grained architectures.- XILINX4000 architecture — Driven synthesis for speed.- The PLD-implementation of Boolean function characterized by minimum delay.- Reconfigurable PCI-BUS interface (RPCI).- Programmable prototyping system for image processing.- A co-simulation concept for an efficient analysis of complex logic designs.- Programming and implementation of reconfigurable routers.- Virtual instruments based on reconfigurable logic.- The >SPuter: Introducing a novel concept for dispatching instructions using reconfigurable hardware.- A 6200 model and editor based on object technology.- Interfacing hardware and software.- Generating layouts for self-implementing modules.