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FPGA Implementations of Neural Networks / Edition 1

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Overview

During the 1980s and early 1990s there was significant work in the design and implementation of hardware neurocomputers. Nevertheless, most of these efforts may be judged to have been unsuccessful: at no time have have ha- ware neurocomputers been in wide use. This lack of success may be largely attributed to the fact that earlier work was almost entirely aimed at developing custom neurocomputers, based on ASIC technology, but for such niche - eas this technology was never sufficiently developed or competitive enough to justify large-scale adoption. On the other hand, gate-arrays of the period m- tioned were never large enough nor fast enough for serious artificial-neur- network (ANN) applications. But technology has now improved: the capacity and performance of current FPGAs are such that they present a much more realistic alternative. Consequently neurocomputers based on FPGAs are now a much more practical proposition than they have been in the past. This book summarizes some work towards this goal and consists of 12 papers that were selected, after review, from a number of submissions. The book is nominally divided into three parts: Chapters 1 through 4 deal with foundational issues; Chapters 5 through 11 deal with a variety of implementations; and Chapter 12 looks at the lessons learned from a large-scale project and also reconsiders design issues in light of current and future technology.

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Product Details

  • ISBN-13: 9780387284859
  • Publisher: Springer US
  • Publication date: 4/21/2006
  • Edition description: 2006
  • Edition number: 1
  • Pages: 360
  • Sales rank: 1,184,969
  • Product dimensions: 9.21 (w) x 6.14 (h) x 0.88 (d)

Table of Contents

1 FPGA neurocomputers 1
2 Arithmetic precision for implementing BP networks on FPGA : a case study 37
3 FPNA : concepts and properties 63
4 FPNA : applications and implementations 103
5 Back-propagation algorithm achieving 5 GOPS on the Virtex-E 137
6 FPGA implementation of very large associative memories 167
7 FPGA implementations of neocognitrons 197
8 Self organizing feature map for color quantization on FPGA 225
9 Implementation of self-organizing feature maps in reconfigurable hardware 247
10 FPGA implementation of a fully and partially connected MLP 271
11 FPGA implementation of non-linear predictors 297
12 The REMAP reconfigurable architecture : a retrospective 325
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