Handbook of Signal Processing Systems / Edition 1

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Handbook of Signal Processing Systems is organized in four parts. The first part motivates representative applications that drive and apply state-of-the art methods for design and implementation of signal processing systems; the second part discusses architectures for implementing these applications; the third part focuses on compilers and simulation tools; and the fourth part describes models of computation and their associated design tools and methodologies.

This handbook provides:

• A comprehensive overview of signal processing systems

• Standalone, complete reference to signal processing systems

• A comprehensive index for ease of use

• An extensive bibliography for further reading

This handbook is essential for those involved in R&D in the design, architecture, and implementation of a wide array of signal processing systems. This handbook is also suitable as a first point of entry to the field for undergraduate and post-graduate students in engineering, computer sciences, and system engineering.

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Product Details

  • ISBN-13: 9781441963444
  • Publisher: Springer US
  • Publication date: 9/1/2010
  • Edition description: 2010
  • Edition number: 1
  • Pages: 1117
  • Product dimensions: 6.20 (w) x 9.30 (h) x 1.70 (d)

Meet the Author

Shuvra S. Bhattacharyya is a Professor in the Department of Electrical and Computer Engineering University of Maryland at College Park. He holds a joint appointment in the University of Maryland Institute for Advanced Computer Studies (UMIACS. Dr. Bhattacharyya is coauthor or coeditor of five books and the author or coauthor of more than 150 refereed technical articles. Dr. Bhattacharyya is director of the Maryland DSPCAD Research Group. He serves as associate editor for the EURASIP Journal on Embedded Systems, International Journal of Embedded Systems, and Journal of Signal Processing Systems. Dr. Bhattacharyya has served as Chair of the IEEE Signal Processing Society Technical Committee on Design and Implementation of Signal Processing Systems (2008-2009). Dr. Bhattacharyya has been a Nokia Distinguished Lecturer (Finland, 2006) and Fulbright Senior Specialist (Germany, 2005 and Austria, 2009). He has received the NSF Career Award (1998). He has received Best Paper Awards at the International Workshop on Systems, Architectures, Modeling, and Simulation (2008); and IEEE Workshop on Signal Processing Systems (2007).

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Table of Contents

Applications Managing Editor: Shuvra Bhattacharyya.- Signal Processing for Control.- Digital Signal Processing in Home Entertainment.- MPEG Reconfigurable Video Coding.- Signal Processing for High-Speed Links.- Video Compression.- Low-power Wireless Sensor Network Platforms.- Signal Processing for Cryptography and Security Applications.- High-Energy Physics.- Medical Image Processing.- Signal Processing for Audio HCI.- Distributed Smart Cameras and Distributed Computer Vision.- Architectures Managing Editor: Jarmo Takala.- Arithmetic.- Application-Specific Accelerators for Communications.- FPGA-based DSP.- General-Purpose DSP Processors.- Application Specific Instruction Set DSP Processors.- Coarse-Grained Reconfigurable Array Architectures.- Multi-core Systems on Chip.- DSP Systems using Three-Dimensional (3D) Integration Technology.- Mixed Signal Techniques.- Programming and Simulation Tools Managing Editor: Rainer Leupers.- C Compilers and Code Optimization for DSPs.- Compiling for VLIW DSPs.- Software Compilation Techniques for MPSoCs.- DSP Instruction Set Simulation.- Optimization of Number Representations.- Intermediate Representations for Simulation and Implementation.- Embedded C for Digital Signal Processing.- Design Methods Managing Editor: Ed Deprettere.- Signal Flow Graphs and Data Flow Graphs.- Systolic Arrays.- Decidable Signal Processing Dataflow Graphs: Synchronous and Cyclo-Static Dataflow Graphs.- Mapping Decidable Signal Processing Graphs into FPGA Implementations.- Dynamic and Multidimensional Dataflow Graphs.- Polyhedral Process Networks.- Kahn Process Networks and a Reactive Extension.- Methods and Tools for Mapping Process Networks onto Multi-Processor Systems-On-Chip.- Integrated Modeling using Finite State Machines and Dataflow Graphs.

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