A comprehensive guide to MEMS materials, technologies and manufacturing, examining the state of the art with a particular emphasis on current and future applications.


See more details below
Handbook of Silicon Based MEMS Materials and Technologies

Available on NOOK devices and apps  
  • NOOK Devices
  • Samsung Galaxy Tab 4 NOOK 7.0
  • Samsung Galaxy Tab 4 NOOK 10.1
  • NOOK HD Tablet
  • NOOK HD+ Tablet
  • NOOK eReaders
  • NOOK Color
  • NOOK Tablet
  • Tablet/Phone
  • NOOK for Windows 8 Tablet
  • NOOK for iOS
  • NOOK for Android
  • NOOK Kids for iPad
  • PC/Mac
  • NOOK for Windows 8
  • NOOK for PC
  • NOOK for Mac
  • NOOK for Web

Want a NOOK? Explore Now

NOOK Book (eBook)
BN.com price


A comprehensive guide to MEMS materials, technologies and manufacturing, examining the state of the art with a particular emphasis on current and future applications.

Key topics covered include:

  • Silicon as MEMS material
  • Material properties and measurement techniques
  • Analytical methods used in materials characterization
  • Modeling in MEMS
  • Measuring MEMS
  • Micromachining technologies in MEMS
  • Encapsulation of MEMS components
  • Emerging process technologies, including ALD and porous silicon

Written by 73 world class MEMS contributors from around the globe, this volume covers materials selection as well as the most important process steps in bulk micromachining, fulfilling the needs of device design engineers and process or development engineers working in manufacturing processes. It also provides a comprehensive reference for the industrial R&D and academic communities.

  • Veikko Lindroos is Professor of Physical Metallurgy and Materials Science at Helsinki University of Technology, Finland.
  • Markku Tilli is Senior Vice President of Research at Okmetic, Vantaa, Finland.
  • Ari Lehto is Professor of Silicon Technology at Helsinki University of Technology, Finland.
  • Teruaki Motooka is Professor at the Department of Materials Science and Engineering, Kyushu University, Japan.

• Provides vital packaging technologies and process knowledge for silicon direct bonding, anodic bonding, glass frit bonding, and related techniques
• Shows how to protect devices from the environment and decrease package size for dramatic reduction of packaging costs
• Discusses properties, preparation, and growth of silicon crystals and wafers
• Explains the many properties (mechanical, electrostatic, optical, etc), manufacturing, processing, measuring (incl. focused beam techniques), and multiscale modeling methods of MEMS structures
Read More Show Less

Product Details

  • ISBN-13: 9780815519881
  • Publisher: Elsevier Science
  • Publication date: 12/8/2009
  • Series: Micro and Nano Technologies
  • Sold by: Barnes & Noble
  • Format: eBook
  • Edition number: 1
  • Pages: 700
  • File size: 20 MB
  • Note: This product may take a few minutes to download.

Table of Contents

Silicon as MEMS Material; Modeling in MEMS; Measuring MEMS; Micromachining Technologies in MEMS; Encapsulation of MEMS Components
Read More Show Less

First Chapter

Handbook of Silicon Based MEMS Materials and Technologies

By Veikko Lindroos Markku Tilli Ari Lehto Teruaki Motooka

William Andrew

Copyright © 2010 Elsevier Inc.
All right reserved.

ISBN: 978-0-08-094772-3

Chapter One

Properties of Silicon

Markku Tilli and Atte Haapalinna Okmetic Oyj, Vantaa, Finland

1.1 Properties of Silicon

Silicon is an abundant element found in the Earth's crust in various compounds. Semiconductor and MEMS applications use more than 20000 tons/year (2008) of high-purity silicon. Today most of the silicon used is either N- or P-type, doped with antimony, arsenic, phosphorus (N-type) or boron (P-type); the dopant concentration ranges between 1013 and 1020 dopant atoms/cm3 Si. Intrinsic (no intentional doping) or very slightly doped high resistivity silicon above 1kΩcm is used in small amounts. Statistics pertaining to silicon can be found, for example, in the US Geological Survey 2006 Minerals Yearbook.

Quartz, or silicon dioxide, is the most common starting raw material for purified silicon for semiconductor and sensor applications, and the Siemens process is the most commonly used in semiconductor-grade silicon production. In the classical Siemens process, metallurgical-grade silicon, made first in an electric arc furnace by reducing quartz with coke, is turned to silicon-hydrogen-chloride compounds in fluidized bed reactors and those compounds are converted to TCS (trichlorosilane, or SiHCl3). TCS is purified by distillation, during which concentrations of impurity compounds having either a lower or higher temperature of volatility than TCS (38.4°C) are reduced. Purified TCS is fed together with hydrogen into a reactor. In the reactor TCS is decomposing onto hot silicon filaments forming a pure polysilicon rod. This rod is then used as a raw material for crystal growth, either in rod form or in crushed pieces. There are alternative, newer techniques for purifying silicon; one variant is similar to the Siemens process but uses silane (SiH4) as a precursor. In some processes, heated silicon filaments are replaced by silicon particles floating in fluidized bed reactors; these processes yield granular polysilicon.

The result of the purification process is high-purity silicon containing very small amounts of foreign dissolved atoms. If the single crystals are manufactured by a Czochralski (CZ) technique, which is most commonly used (>> 90% of the crystals), the impurity level increases, as the growth is made from a quartz crucible having some impurities. The result is, however, still acceptable. Typically, most of the contamination of the silicon takes place during actual device manufacturing. Of impurities, metals are generally harmful, with rare exceptions, and their concentration should be as low as possible, typically << 1012 at/cm3 Si. Oxygen coming from the CZ-crystal growth step as an impurity has a dual role: it has beneficial effects (strengthening of the silicon lattice at high temperatures, gettering effect in semiconductor use) but also has detrimental effects (donor formation, defect generation). Nitrogen is a second example of an impurity, and it can be used in small quantities to enhance silicon properties, especially in IC applications.

The current high demand for low-cost solar-grade silicon encourages the exploitation of alternative sources and new purification techniques. Currently these methods are not able to produce semiconductor-grade silicon pure enough for MEMS applications, although in solar applications these new methods already show promising results. Woditsh and Koch and Istratov et al. list some of the available solar silicon purification techniques.

Silicon is an ideal material for various MEMS applications. Silicon is a semiconductor whose resistivity can be adjusted by doping from sub-mΩcm to several kΩcm; it is quite inert in a normal environment, hard, transparent in an infrared regime, and elastic at room temperature with no plastic deformation and with high fracture strength. Finally, a protective stable silicon dioxide can be grown. Silicon crystal has anisotropic properties—mechanical, chemical and electrical—which can be exploited in MEMS component designs. Very large silicon single crystals in various crystal orientations can be made with relative ease. These unique combinations of properties have placed silicon as the number 1 material in MEMS manufacturing, although it took almost 30 years after the invention of the silicon transistor until the potential of silicon as a micromechanical material was widely realized; see Petersen. Table 1.1 lists some basic parameters of silicon. Some of the parameters depend on doping level as well as temperature and have an effect on MEMS device function.

A more comprehensive treatise on basic silicon properties can be found, for instance, in a handbook edited by Hull or in Landolt-Börnstein Group III: Condensed Matter volumes.

1.1.1 Crystallography of Silicon

Silicon crystallizes into a diamond cubic crystal structure (Figure 1.1) in which the atoms are covalently bonded. Other elements, like germanium, in periodic table group IV typically have the same structure. The unit cell contains 8 atoms, and the atoms follow a face centered cubic (fcc) Bravais lattice. In each fcc lattice point there are 2 atoms (motif): one in the lattice point and the second displaced by 1/4 of the unit cell length towards the direction. The unit cell length at room temperature is 0.5431nm. Actually, this value is one of the most precisely known among elements, since silicon crystal can be grown almost perfectly, and the lattice parameter can be measured precisely according to Martin et al. with an uncertainty of about 3...6*10-8. Thus, silicon is a good candidate for various references, for instance, in determining Avogadro's constant. The density of packing of silicon in this lattice is ~34%. The packing density is quite loose compared with that of fcc lattices (some metals, like copper, have this structure), whose packing density is 74%, and that of a body centered cubic structure (for instance, pure iron at room temperature), whose packing density is 68%. The largest empty place in the diamond cubic lattice is the octahedral hole, which can occupy an atom 41% of the size of the host atom. Atoms dissolved in the lattice in empty places are called interstitial atoms; the solubility is called interstitial solubility. The most typical interstitially dissolved (impurity) atom is oxygen. The maximum oxygen equilibrium content at crystal growing in the interstitial state can in practice be almost up to 20ppm, which corresponds to up to 1018 atoms/cm3 Si. Carbon is the second most common interstitial impurity in silicon; in practice the concentration is ,0.3ppm in semiconductor-grade material. Dopant atoms, of which boron, antimony, arsenic, and phosphorus are commonly used, are in substitutional lattice sites (i.e., replacing silicon atoms), with the exception of very high doping levels (meaning high concentrations above 1018 atoms/cm3 Si), at which a small fraction of the doping elements are electrically inactive and in interstitial places. The maximum substitutional solubility depends on the atom size and some other factors; typically it is <1021 atoms/cm3. Germanium is an exception; it is completely miscible. Miller Index (hkl) System

A convenient way to describe atomic planes and directions in the crystal lattice is to use Miller indexes. When the lattice has maximum symmetry, or is cubic (as the silicon lattice is)—that is, the lattice axes are orthogonal and the lattice parameters in all directions x,y,z are identical—the Miller notation is easy to use and is described later.

Let us consider an orthogonal coordinate system, with axes x, y, and z, with equal unit vector size, a (Figure 1.2). In Figure 1.2a the plane intercepts the x-axis at a distance a from the origin and is parallel to the y- and z-axes, or intercepts them at ∞. The intercept points in each axis are thus a, ∞, ∞. Miller indexes (hkl) are constructed in such a way that reciprocals of the intersect points are taken. Thus, in the case of Figure 1.2a, the Miller indexes (hkl) are a/a, a/∞, a/∞ or (100). If the plane intercept points would be 1/2 a, ∞, ∞, Miller indexes of that plane would be (200). A plane intersecting axis y at a and the x and z axes at ∞, respectively, is (010). If the plane would intersect axis y at -a, and the x and z axes at ∞, it is (0-10) or (0l0) in Miller notation, where the negative sign is above the index number.

A plane(110) means that plane intersect points are a,0,0, 0,a,0, and 0,0, ∞; with (111), plane intersect points are, in a similar way, a,0,0, 0,a,0 and 0,0,a. Correspondingly, the (321) plane is a plane with intersects at points a/3,0,0, 0,a/2,0 and 0,0,a (Figure 1.2f). The convention is that when the plane is marked as (hkl), it means that the plane is only that. If the marking is {hkl}, all planes in the same family are included, and in a cubic lattice it means that {khl} includes all 8 identical planes (hkl), (hkl), (hkl), (hkl), (hkl), (hkl), (hkl) and (hkl). Indexes for directions are expressed in square brackets as [hkl]. The direction is perpendicular to the plane. Finally the family of directions is expressed as hkl , and again in cubic lattice it includes all identical 8 directions (hkl), (hkl), (hkl), (hkl), (hkl), (hkl), (hkl) and (hkl). Those who would like to have a comprehensive picture of Miller indexes should consult, for instance, Cullity and Stock. Stereographic Projection

Stereographic projection in crystallography is a helpful and illustrative tool when investigating atomic planes or directions and visualizing various orientation dependent phenomena. In stereographic projection crystal directions are projected onto a plane. Construction of stereographic projection is made as follows: The crystal lattice is placed in the center point of the sphere and crystallographic directions are projected onto the sphere's surface. A plane touching the sphere in point S is drawn. A line connecting points N and the projection point of the crystallographic direction on the sphere P* is drawn. This line intersects the plane in point P. When all crystallographic low index directions intersecting the sphere in the southern hemisphere are drawn and projected to plane, a stereographic projection is constructed. This kind of projection preserves angles (but not areas), so it is possible to measure angles between crystallographic directions. This can be done manually using a Wulff's net. Silicon based MEMS technology uses commonly (100) oriented silicon wafers; that is, the (100) crystallographic plane is the surface of the wafer. Less often, wafers with (111) or (110) are used. Some special applications may use off-oriented wafers, for instance, where the angle between (111) plane and water surface is 45°. Below are stereographic projections of cubic crystals in (100), (111) and (110) orientations constructed in such a way that the wafer orientation mark (a flat or notch) is facing downward and is of 01l type.

There is useful commercial and free software for construction of stereographic projections and calculation of angles between directions and planes. A comprehensive presentation about stereographic projections and their use can be found, for example, in Cullity and Stock (Figures 1.3-1.7)

1.1.2 Defects in Silicon Lattice

Although single crystalline silicon is almost perfect to a degree where it can be used as a standard to define Avogadro's constant, in reality single crystals made either with CZ or float zone (FZ) growing methods contain defects, some of which are characteristic to the particular growing method. Furthermore, defects are formed intentionally or unintentionally during the processing of silicon wafers to final components. These defects can be classified as (1) point defects (or their agglomerates), (2) linear defects, (3) planar defects or (4) volume defects.

Silicon crystals are grown from the melt. Because of the low diffusivity of the point defects—vacancies and self-interstitials—many of the defects thermodynamically at equilibrium concentration at the freezing point are "frozen in" the crystal during cooling phase. Depending on the temperature gradient close to the freezing interface and the time at high temperatures, point defect agglomerates can be formed, too. In IC technology COPs (crystal originated particles, or large vacancy agglomerates) have a great impact on thin gate oxide integrity, for instance. Crystals grown with the CZ method also contain foreign atoms, like oxygen and carbon. Initially they are like point defects or clusters of a few atoms in the crystal at equilibrium in freezing temperature, and at normal device processing temperatures they are supersaturated, eventually generating volume defects (precipitates) and/or secondary linear or planar defects. A growing oxide precipitate can nucleate stacking fault or dislocation loops around the precipitate. Oxygen can also form electrically or optically active defects, donors, which are discussed later in Section 3.6. Therefore, it is essential to control these defects not only in device manufacturing but also in the crystal growing step. As the relationship of the growth in defects in the crystals and defects in finished devices is complex and depends on the thermal processing steps, it is beneficial for the crystal grower to know, in as detailed a manner as possible the device manufacturing steps to optimize the behavior of the silicon. Reviews of Falster et al. give an overview of intrinsic point defects in CZ silicon.

Linear defects are called dislocations (see Section 11.2). In silicon single crystals grown by CZ or Float Zone methods, or in wafers cut from these crystals, the dislocation density is practically zero. During the processing of the silicon wafer at higher temperatures, the applied stress may generate dislocations. The origin of these stresses can be thermal gradients during temperature transients in heat treatment steps, or mismatch stresses caused by thin films or heavily doped areas in combination by high temperatures. Movement of dislocations through the crystal lattice causes permanent deformation. Dislocations in silicon move on {111} planes along 110 directions. This deformation can be seen visually as slip lines. If the deformation is heavy, the wafer warpage may increase. In general dislocations in silicon wafers have adverse effects on device performance, and in the worst case dislocations may even prevent the device from functioning. Dislocations attract impurities, and the result can be that moving dislocations leave precipitate colonies behind. Dislocations can also match together two parts of silicon lattices having slightly different lattice constants. This happens when an epitaxial layer is grown on a substrate and their doping levels differ substantially (see Figure 6.11). These dislocations are called misfit dislocations, and normally they are confined in the interface. In MEMS applications where silicon is etched, areas containing dislocations generally have a non-uniform etch result because of the stress field around the dislocation core. A further consequence of the presence of dislocations is a reduction of yield strength at higher temperatures. The yield strength of zero dislocation silicon is higher than silicon having dislocations in temperatures where plastic deformation can occur. This means that once slip has occurred, silicon wafers are more susceptible to additional slip in following thermal treatments. However, dislocation locking by impurity atoms diffusing to the dislocation core or strained area increases resistance to additional slip.


Excerpted from Handbook of Silicon Based MEMS Materials and Technologies by Veikko Lindroos Markku Tilli Ari Lehto Teruaki Motooka Copyright © 2010 by Elsevier Inc. . Excerpted by permission of William Andrew. All rights reserved. No part of this excerpt may be reproduced or reprinted without permission in writing from the publisher.
Excerpts are provided by Dial-A-Book Inc. solely for the personal use of visitors to this web site.

Read More Show Less

Customer Reviews

Be the first to write a review
( 0 )
Rating Distribution

5 Star


4 Star


3 Star


2 Star


1 Star


Your Rating:

Your Name: Create a Pen Name or

Barnes & Noble.com Review Rules

Our reader reviews allow you to share your comments on titles you liked, or didn't, with others. By submitting an online review, you are representing to Barnes & Noble.com that all information contained in your review is original and accurate in all respects, and that the submission of such content by you and the posting of such content by Barnes & Noble.com does not and will not violate the rights of any third party. Please follow the rules below to help ensure that your review can be posted.

Reviews by Our Customers Under the Age of 13

We highly value and respect everyone's opinion concerning the titles we offer. However, we cannot allow persons under the age of 13 to have accounts at BN.com or to post customer reviews. Please see our Terms of Use for more details.

What to exclude from your review:

Please do not write about reviews, commentary, or information posted on the product page. If you see any errors in the information on the product page, please send us an email.

Reviews should not contain any of the following:

  • - HTML tags, profanity, obscenities, vulgarities, or comments that defame anyone
  • - Time-sensitive information such as tour dates, signings, lectures, etc.
  • - Single-word reviews. Other people will read your review to discover why you liked or didn't like the title. Be descriptive.
  • - Comments focusing on the author or that may ruin the ending for others
  • - Phone numbers, addresses, URLs
  • - Pricing and availability information or alternative ordering information
  • - Advertisements or commercial solicitation


  • - By submitting a review, you grant to Barnes & Noble.com and its sublicensees the royalty-free, perpetual, irrevocable right and license to use the review in accordance with the Barnes & Noble.com Terms of Use.
  • - Barnes & Noble.com reserves the right not to post any review -- particularly those that do not follow the terms and conditions of these Rules. Barnes & Noble.com also reserves the right to remove any review at any time without notice.
  • - See Terms of Use for other conditions and disclaimers.
Search for Products You'd Like to Recommend

Recommend other products that relate to your review. Just search for them below and share!

Create a Pen Name

Your Pen Name is your unique identity on BN.com. It will appear on the reviews you write and other website activities. Your Pen Name cannot be edited, changed or deleted once submitted.

Your Pen Name can be any combination of alphanumeric characters (plus - and _), and must be at least two characters long.

Continue Anonymously

    If you find inappropriate content, please report it to Barnes & Noble
    Why is this product inappropriate?
    Comments (optional)