Integrated Passive Component Technology
  • This is a thorough survey of the state-of-the-art in Integrated Passive Component Technology.
  • Describes the processes available for creating integrated passives, measuring their properties, and applying them.
  • Brings reader up to date in a fast-moving technology.
  • Enables reader to implement the technology into a manufacturing environment.
  • Covers existing and potential technologies for various substrate systems such as FR4, ceramic, and HDI.
  • Describes applications favorable to integrated passives and the economic tradeoffs associated with their implementation.
1101194783
Integrated Passive Component Technology
  • This is a thorough survey of the state-of-the-art in Integrated Passive Component Technology.
  • Describes the processes available for creating integrated passives, measuring their properties, and applying them.
  • Brings reader up to date in a fast-moving technology.
  • Enables reader to implement the technology into a manufacturing environment.
  • Covers existing and potential technologies for various substrate systems such as FR4, ceramic, and HDI.
  • Describes applications favorable to integrated passives and the economic tradeoffs associated with their implementation.
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Integrated Passive Component Technology

Integrated Passive Component Technology

Integrated Passive Component Technology

Integrated Passive Component Technology

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Overview

  • This is a thorough survey of the state-of-the-art in Integrated Passive Component Technology.
  • Describes the processes available for creating integrated passives, measuring their properties, and applying them.
  • Brings reader up to date in a fast-moving technology.
  • Enables reader to implement the technology into a manufacturing environment.
  • Covers existing and potential technologies for various substrate systems such as FR4, ceramic, and HDI.
  • Describes applications favorable to integrated passives and the economic tradeoffs associated with their implementation.

Product Details

ISBN-13: 9780471244318
Publisher: Wiley
Publication date: 06/30/2003
Pages: 400
Product dimensions: 6.38(w) x 9.65(h) x 0.95(d)

About the Author

RICHARD K. ULRICH, PhD, is a professor of Chemical Engineering at the University of Arkansas at Fayetteville. He is a NEMI committee member, a Visiting Associate Editor for IEEE Transactions on Advanced Packaging, and past chair of the Electrochemical Society’s Dielectric Science and Technology Division.

LEONARD W. SCHAPER, Jr., Dr Engr Sc, is a professor of Electrical Engineering at the University of Arkansas in Fayetteville. He is a Fellow of both the IEEE and the International Microelectronics and Packaging Society. He chairs the IEEE CPMT Technical Committee on Discrete and Integral Passives.

Read an Excerpt

Integrated Passive Component Technology


John Wiley & Sons

Copyright © 2003 IEEE
All right reserved.

ISBN: 0-471-24431-7


Chapter One

INTRODUCTION

RICHARD K. ULRICH

Integrating passive components directly into the circuit board is a well-established idea but an immature practice. To put this into perspective, compare two technologies familiar today: the laser and color TV. The laser came about comparatively suddenly in the early 1960s, taking much of the technological community by surprise. It was an unanticipated invention, to most, whose utility became obvious when the technology was revealed. In contrast, color TV was anticipated for decades. Its potential benefits and anticipated implementation problems were well established long before its common usage in the industry. Debate ensued for years over the most effective and economical solutions to the numerous interrelated technical issues. It was an engineered system, not an invention, developed to augment a well-established technology, and it was not clear how much of that old technology it would displace.

Integrated passives are like color TV. Those in the electronics business have a firm idea of the benefits integrated passives can bring as well as the problems of implementing them into one of the largest and most established industries in the world. There are a large number of candidate materials and processes but little agreement as of yet over which, if any, are superiorto the rest. The purpose of this book is to identify these potential payoffs and problems and to provide an overview of the current technologies available in order to help the engineer choose the best options for integrating passive components in a given application.

This first chapter will provide a summary of the state of surface-mount passives, an introduction to the concept, benefits, and problems of integrated passives, and some coverage of the fabrication and materials technologies involved. As many relevant references as possible are included to help the reader follow up on a topic of interest. The organization of this book is such that the introduction provides a general overview for readers of just about any level of familiarity with the subject and the rest of the chapters are more specific to individual topics. The reader should at least skim this first chapter, and then choose subsequent chapters of special interest for further study.

1.1 STATUS AND TRENDS IN DISCRETE PASSIVE COMPONENTS

Tremendous progress has been made in the past four decades in miniaturizing and integrating transistors and capacitors for logic applications onto silicon. By comparison, passive components (resistors, capacitors, and inductors) at the circuit-board level have made only incremental advances in size and density. Consequently, passive components occupy an increasingly larger area and mass fraction of electronic systems and are a major hurdle to the miniaturization of many electronic systems. This is particularly true for analog and mixed-signal applications that use a larger number of passives than typical digital systems. Almost no through-hole, axial-leaded resistors and disk capacitors are used anymore; they have been replaced with smaller, rectangular surface-mount components with solder joints at both ends. The size of these modern discretes is described by a number such as 0603, which indicates a size of 60 × 30 mils (1.5 × 0.75 mm). The 0402 (1.0 × 0.5 mm) size is commonly used, and the smallest discrete passives today are 0201 (0.50 × 0.25 mm), which represents a considerable challenge in handling, attachment, and inspection. Figure 1.1 shows a cell phone RF section that utilizes 0402 resistors and capacitors surrounding a 6 × 6 mm packaged integrated circuit. About a trillion passive devices were placed in electronic systems in 2000, with the vast majority utilizing surface-mount technology. Today, each mounted passive costs about half a U.S. cent to purchase, and about 1.3 cents for conversion (assembly, testing, inspection, and rework), for a total installed cost of around 1.8 cents. The present total market for passive devices is around $18 billion annually.

In terms of numbers, there are more passive devices than active devices in just about any application. An Ericsson CF388 PCS 1900 cell phone has 380 components, including 322 passives and 15 ICs, for a passive-to-active ratio of 21:1. Digital systems, such as desktop and laptop computers, have somewhat lower ratios: between 5 and 15 passives for every IC (see Table 1.1). An Apple G4 has 230 capacitors, 218 resistors, 9 inductors, and 8 diodes mounted on the motherboard, together with 42 integrated circuits.

In terms of area, an individual surface-mount passive is almost always smaller than any packaged IC and usually has only two connections, so the relative total footprints and total number of device-to-board connections are closer to equal. Figure 1.2 shows part of a board from a Nokia 6161 cell phone with the location and footprint of surface-mount discrete passives marked in white. Typical passive component density in hand-held wireless applications is about 20/[inch.sup.2], which, at 2 cents/component, amounts to $0.40/[inch.sup.2] for passives alone.

A breakdown of the 405 individual passive components by number and value for this same phone is shown in Table 1.2. Additionally, there are 15 ICs and 40 miscellaneous surface-mount devices such as power transistors and diodes for ESD protection, all mounted onto 6.2 square inches of board area for an average passive density of 85/[inch.sup.2].

The number of discrete passives in a model series of desktop computers over the years is given in Table 1.3. Some trends are clear: a rapid increase in the total number of passives utilized, a total switch from leaded to SMT components, and the initiation of the use of passive arrays-multiple passives in one package. Mobile wireless, including cell phones, will account for the largest share of the increase in passive usage in coming years but other significant new markets include Bluetooth and automotive applications. The 2000 National Electronic Manufacturing Initiative (NEMI) roadmap predicts that cell phone sales will reach one billion units annually by 2004, which will require replacing half the cell phones in use today, and there should be two billion Bluetooth devices operating by 2005. Telecommunications has replaced computers as the top user of printed wiring boards.

An analysis of two cell phones, one GPS receiver, and two two-way radios produced the resistor and capacitor distributions shown in Figures 1.3, 1.4, and 1.5. The required values extend over many orders of magnitude for resistors and capacitors. Inductors range in value from about 1 to 50 nH, but there are usually far fewer inductors than capacitors and resistors in most consumer microelectronic products. It has been observed that 40% of capacitors in a cell phone are under 1 nF and 80% of inductors in hand-held products are less than 200 nH.

In summary, all types of electronic systems are becoming more complex while pressure is simultaneously mounting to make them smaller and lighter. The numbers of passives are steadily increasing and the required range of values is very wide. Manufacture and placement of 0201 discretes may represent the size and density limit for SMT devices.

1.2 DEFINITIONS AND CONFIGURATIONS OF INTEGRATED PASSIVES

"Passives" usually refer to resistors, capacitors, and inductors, but could also include thermistors, varistors, transformers, temperature sensors, and almost any non-switching analog device. The concept of "integrated," "integral," "embedded," "arrayed," or "networked" passives involves manufacturing them as a group in or on a common substrate instead of in their own individual packages. The following lexicology will be used in this book:

Discrete Passive Component-This is a single passive element in its own leaded or surface-mount-technology (SMT) package. An example would be a single resistor, capacitor, or inductor in an 0402 package, as shown in Figure 1.1. This will typically have two contacts to be soldered to the board. Presently, the vast majority of passives are utilized in this manner. Integrated Passive Component-This is a general term for multiple passive components that share a substrate and packaging. They may be housed inside the layers of the primary interconnect substrate, which would give them the subdesignation of an "embedded passive component," or they may be on the surface of a separate substrate that is then placed in an enclosure and surface mounted on the primary interconnect substrate, in which case they would be called "passive arrays" or "passive networks" (see below). Embedded Passive Component-One that is formed or otherwise inserted inside the primary interconnect substrate as opposed to being on the surface. (See Figure 1.6.) Passive Array-Multiple passive components of like function are formed on the surface of a separate substrate and packaged in a single SMT case. This case is then mounted on the primary interconnect substrate of the system. (See Figure 1.7.) Examples include an array of capacitors or an array of resistors. The number of leads will typically be twice the number of internal components in the array but more leads may be provided to reduce the total inductance in capacitor arrays, or fewer leads may be present if some of the components are connected internally, such as for voltage dividers. Inductors are not normally arrayed since their separate electromagnetic fields would interfere with one another in close proximity. The passive array does not always reduce the number of leads that must be attached, but does increase the efficiency of their attachment since more connections are made with one alignment and mounting. This is the lowest level of passive integration and may involve the same manufacturing techniques used for discretes. Integrated Passive Networks-Multiple passive components of more than one function are formed on the surface of a separate substrate and packaged in a single SMT case. This case is then mounted on the primary interconnect substrate of the system. (See Figure 1.8.) These typically have some internal connections to form simple functions such as terminators or filters. The number of leads can vary with functionality and the number of internal elements. This approach generally does reduce the number of leads to be connected since some passive-to-passive connections are made within the package. (See Figure 1.9.) Both passive arrays and networks of various types are available from several manufacturers and are in common use in all types of electronic systems as surface-mount components as small as 0402. They are particularly useful in digital systems in which parallel data buses require RC termination or pull-up/pull-down resistors for many lines in a small footprint. Their commercial penetration is probably less than 5% at this time but is expected to increase. Integrated Passive Subsystems-These are similar to but more complex than passive networks and may include some active devices to form a functional subsystem module that can be surface mounted onto the primary interconnect board. Figure 1.10 shows a voltage-controlled oscillator from Intarsia that consists of integrated passives featuring several visible square-format integrated inductors and planar capacitors, along with three wire-bonded actives. The solder balls enable the network to be flipped and mounted onto a primary interconnect substrate, made possible by the low profile of the integrated passives. It may be feasible to provide subsystems as complex as GPS or Bluetooth this way, so that a manufacturer could add them as desired to a primary interconnect board of another product.

1.3 COMPARISON TO INTEGRATED ACTIVE DEVICES

To understand the potential benefits and issues of integrated passives, the obvious parallel is the integration of active devices. In the 1950s, the term "interconnect problem" referred to the dilemma that engineers could design digital electronic systems that were much more complex than could be manufactured at the time, since all individual active devices had to be individually manufactured, packaged separately, manually placed, and hand-soldered onto a circuit board. Although transistors were mass-produced at low price, the price of an electronic system was dominated by the cost of interconnecting these individually packaged components at the circuit-board level. In addition to the high cost of manual interconnection, problems existed due to the resulting system size and complexity, along with low reliability brought about by the large number of solder joints.

The invention of the integrated circuit in 1958 greatly reduced these problems by employing chemical means instead of mechanical means to fabricate transistors and interconnects all at once on a common substrate. As a result, the cost of producing one gate on a chip is the same as the cost of producing millions of the same size or, in other words, the incremental cost of one more transistor is zero. The first transistor on a Pentium 4 might cost $300, but the next 41,999,999 are free. Soldered connections were eliminated and changes in layout could be made by simply changing artwork. Initially, there was some concern that large-scale integration could never be realized because of yield issues; absolutely every gate must work for the system to function since there is no possibility of rework. For instance, to obtain a chip yield of at least 80% for an IC with 10 million transistors, the number of defective individual transistors must average no more than about one in 44 million. However, the status of present-day thin film formation, photolithography, and etching routinely achieve these numbers and better. Although chip size is somewhat constrained by yield concerns, the density of active devices on a chip is not; that is more a function of the ability to expose and etch fine features. Since the invention of the integrated circuit, continuous improvements in yield and gate density have resulted in a steady increase in the functionality of a single chip. The result, as described by Moore's law, is that on-chip logic density has doubled about every 18 months for decades and will do so for at least another one. The resulting orders-of-magnitude increases in function per unit cost, volume, and mass are well known, and, in fact, still drive a large portion of our economy.

The status of passive components today is similar to that of active devices almost half a century ago. Many of the same well-known motivations and concerns relate to passive integration; the task is to determine which of these apply to this new scenario and what they mean to the rate of acceptance, ultimate configurations, and degree of replacement of discrete components. There are several differences in the two situations; the most important is that passive components cannot be scaled down in size to the extent that active devices can be. Since logic devices such as transistor-based gates and memory cells can, in principle, operate with individual electrical quanta; they can be scaled down to the submicron dimensions that are ubiquitous today. However, the signals processed in analog systems or digital signals at the board level cannot be reduced in amplitude arbitrarily. They may be RF signals going to an antenna, the input for A/D conversion, or bursts of hundreds of watts of power to a single chip during a clock cycle. As a result, increases in integrated passive component density can only come about when the passive is made smaller while maintaining the same value of Ohms, Farads or Henrys (Figure 1.11). As will be frequently pointed out in this book, the need for higher values of resistance and capacitance per unit area is a limiting factor in the implementation of integrated passives, underscoring the importance of fundamental materials research in this area.

1.4 SUBSTRATES AND INTERCONNECT SYSTEMS FOR INTEGRATED PASSIVES

(Continues...)



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Table of Contents

Contributors.

Preface.

1 Introduction (Richard K. Ulrich).

1.1 Status and Trends in Discrete Passive Components.

1.2 Definitions and Configurations of Integrated Passives.

1.3 Comparison to Integrated Active Devices.

1.4 Substrates and Interconnect Systems for Integrated Passives.

1.5 Fabrication of Integrated Passives.

1.6 Reasons for Integrating Passive Devices.

1.7 Problems with Integrating Passive Devices.

1.8 Applications for Integrated Passives.

1.9 The Past and Future of Integrated Passives.

1.10 Organization of this Book.

References.

2 Characteristics and Performance of Planar Resistors (Richard K. Ulrich).

2.1 Performance Parameters.

2.2 Resistance in Electronic Materials.

2.3 Sizing Integrated Resistors.

2.4 Trimming.

References.

3 Integrated Resistor Materials and Processes (Richard K. Ulrich).

3.1 Single-Component Metals.

3.2 Metal Alloys and Metal–Nonmetal Compounds.

3.3 Semiconductors.

3.4 Cermets.

3.5 Polymer Thick Film.

3.6 Ink Jet Deposition.

3.7 Commercialized Processes.

3.8 Summary.

References.

4 Dielectric Materials for Integrated Capacitors (Richard K. Ulrich).

4.1 Polarizability and Capacitance.

4.2 Capacitance Density.

4.3 Temperature Effects.

4.4 Frequency and Voltage Effects.

4.5 Aging Effects.

4.6 Composition and Morphology Effects.

4.7 Leakage and Breakdown.

4.8 Dissipation Factor.

4.9 Comparison to EIA Dielectric Classifications.

4.10 Matching Dielectric Materials to Applications.

References.

5 Size and Configuration of Integrated Capacitors (Richard K. Ulrich).

5.1 Comparison of Integrated and Discrete Areas.

5.2 Layout Options.

5.3 Tolerance.

5.4 Mixed Dielectric Strategies.

5.5 CV Product.

5.6 Maximum Capacitance Density and Breakdown Voltage.

References.

6 Processing Integrated Capacitors (Richard K. Ulrich).

6.1 Sputtering.

6.2 CVD, PECVD and MOCVD.

6.3 Anodization.

6.4 Sol-Gel and Hydrothermal Ferroelectrics.

6.5 Thin- and Thick-Film Polymers.

6.6 Thick-Film Dielectrics.

6.7 Interlayer Insulation.

6.8 Interdigitated Capacitors.

6.9 Capacitor Plate Materials.

6.10 Trimming Integrated Capacitors.

6.11 Commercialized Integrated Capacitor Technologies.

6.12 Summary.

References.

7 Defects and Yield Issues (Richard K. Ulrich).

7.1 Causes of Fatal Defects in Integrated Capacitors.

7.2 Measurement of Defect Density.

7.3 Defect Density and System Yield.

7.3.1 Predicting Yield from Defect Density.

7.4 Yield Enhancement Techniques for Capacitors.

7.5 Conclusions.

References.

8 Electrical Performance of Integrated Capacitors (Richard K. Ulrich and Leonard W. Schaper).

8.1 Modeling Ideal Passives.

8.2 Modeling Real Capacitors.

8.3 Electrical Performance of Discrete and Integrated Capacitors.

8.4 Dissipation Factor of Real Capacitors.

8.5 Measurement of Capacitor Properties.

8.6 Summary.

References.

9 Decoupling (Leonard W. Schaper).

9.1 Power Distribution.

9.2 Decoupling with Discrete Capacitors.

9.3 Decoupling with Integrated Capacitors.

9.4 Dielectrics and Configurations for Integrated Decoupling.

9.5 Integrated Decoupling as an Entry Application.

References.

10 Integrated Inductors (Geert J. Carchon and Walter De Raedt).

10.1 Introduction.

10.2 Inductor Behavior and Performance Parameters.

10.3 Inductor Performance Prediction.

10.4 Integrated Inductor Examples.

10.5 Use of Inductors in Circuits: Examples.

10.6 Conclusions.

Acknowledgments.

References.

11 Modeling of Integrated Inductors and Resistors for Microwave Applications (Zhenwen Wang, M. Jamal Deen, and A. H. Rahal).

11.1 Introduction.

11.2 Modeling of Spiral Inductors.

11.3 Modeling of Thin-Film Resistors.

11.4 Conclusions.

References.

Appendix: Characteristics of Microscript Lines.

12 Other Applications and Integration Technologies (Elizabeth Logan, Geert J. Carchon, Walter De Raedt, Richard K. Ulrich, and Leonard W. Schaper).

12.1 Demonstration Devices Fabricated with Integrated Passives.

12.2 Commercialized Thin-Film Build-Up Integrated Passives.

12.3 Other Integrated Passive Technologies.

12.4 Summary.

Acknowledgments.

References.

13 The Economics of Embedded Passives (Peter A. Sandborn).

13.1 Introduction.

13.2 Modeling Embedded Passive Economics.

13.3 Key Aspects of Modeling Embedded Passive Costs.

13.4 Example Case Studies.

13.5 Summary.

Acknowledgments.

References.

14 The Future of Integrated Passives (Richard K. Ulrich).

14.1 Status of Passive Integration.

14.2 Issues for Implementation on Organic Substrates.

14.3 Progress on Board-Level Implementation.

14.4 Three Ways In for Organic Boards.

14.5 Conclusion.

Index.

About the Editors.

What People are Saying About This

From the Publisher

"…a comprehensive look at the reasons and current challenges…[of integrating] passive devices into board or IC…just the right dose of the math to explain the physics and theory behind the technology." (IEEE Circuits & Devices Magazine, Jan/Feb 2005)

"...an interesting and useful book; I wholeheartedly recommend it."(Circuit World, Vol.30, No. 2003)

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