Nanoscale CMOS VLSI Circuits: Design for Manufacturability

by Sandip Kundu, Aswin Sreedhar

Overview

Cutting-Edge CMOS VLSI Design for Manufacturability Techniques

This detailed guide offers proven methods for optimizing circuit designs to increase the yield, reliability, and manufacturability of products and mitigate defects and failure. Covering the latest devices, technologies, and processes, Nanoscale CMOS VLSI Circuits: Design for Manufacturability focuses on delivering higher performance and lower power consumption. Costs, constraints, and computational efficiencies are also discussed in the practical resource.

Nanoscale CMOS VLSI Circuits covers:

• Current trends in CMOS VLSI design
• Semiconductor manufacturing technologies
• Photolithography
• Process and device variability: analyses and modeling
• Manufacturing-Aware Physical Design Closure
• Metrology, manufacturing defects, and defect extraction
• Defect impact modeling and yield improvement techniques
• Physical design and reliability
• DFM tools and methodologies

Product Details

ISBN-13:	9780071635202
Publisher:	McGraw Hill LLC
Publication date:	06/22/2010
Sold by:	Barnes & Noble
Format:	eBook
Pages:	316
File size:	9 MB

About the Author

Dr. Sandip Kundu is a professor in the Electrical and Computer Engineering Department at the University of Massachusetts at Amherst, specializing in semiconductor and lithographic manufacturing.

Dr. Aswin Sreedhar is a research assistant at the Electrical and Computer Engineering Department at the University of Massachusetts.

Table of Contents

Chapter 1. Introduction; Chapter 2. Semiconductor Manufacturing; Chapter 3. Process and Device Variability: Analysis and Modeling; Chapter 4. Manufacturing-Aware Physical Design Closure; Chapter 5. Metrology, Manufacturing Defects, and Defect Extraction; Chapter 6. Defect Impact Modeling and Yield Improvement Techniques; Chapter 7. Physical Design and Reliability; Chapter 8. Design for Manufacturability: Tools and Methodologies