Parallel Computer Organization and Design

by Michel Dubois, Murali Annavaram, Per Stenström

Overview

Teaching fundamental design concepts and the challenges of emerging technology, this textbook prepares students for a career designing the computer systems of the future. Self-contained yet concise, the material can be taught in a single semester, making it perfect for use in senior undergraduate and graduate computer architecture courses. This edition has a more streamlined structure, with the reliability and other technology background sections now included in the appendix. New material includes a chapter on GPUs, providing a comprehensive overview of their microarchitectures; sections focusing on new memory technologies and memory interfaces, which are key to unlocking the potential of parallel computing systems; deeper coverage of memory hierarchies including DRAM architectures, compression in memory hierarchies and an up-to-date coverage of prefetching. Practical examples demonstrate concrete applications of definitions, while the simple models and codes used throughout ensure the material is accessible to a broad range of computer engineering/science students.

Product Details

ISBN-13:	9781107486805
Publisher:	Cambridge University Press
Publication date:	08/30/2012
Sold by:	Barnes & Noble
Format:	eBook
File size:	12 MB
Note:	This product may take a few minutes to download.

About the Author

Michel Dubois (1953–2022) was Professor Emeritus of Electrical and Computer Engineering at the University of Southern California (USC). Before joining USC in 1984, he was a research engineer at the Central Research Laboratory of Thomson-CSF in Orsay, France. He published more than 150 technical papers on computer architecture, as well as three book chapters and three books.

Murali Annavaram is the Lloyd Hunt Chair Professor in the Ming-Hsieh Department of Electrical and Computer Engineering and in the Thomas Lord department of Computer Science (joint appointment) at the University of Southern California. He is the founding director of the REAL@USC-Meta center that is focused on research and education in AI and learning. He is a Fellow of IEEE and Distinguished Member of ACM.

Per Stenström is Professor at Chalmers University of Technology. His research interests are in parallel computer architecture. He has authored or co-authored four textbooks, about 200 publications and twenty patents in this area. He is a Fellow of the ACM and the IEEE and a member of Academia Europaea and the Royal Swedish Academy of Engineering Sciences. He was the 2021 recipient of ACM SIGARCH Alan Berenbaum Distinguished Service Award.

Table of Contents

Preface; 1. Introduction; 2. Processor microarchitecture; 3. Memory hierarchies; 4. Multiprocessor systems; 5. Coherence, synchronization, and memory consistency; 6. Chip multiprocessors; 7. Quantitative evaluations; 8. Graphics Processing Units; Appendix A. Impact of technology; Appendix B. Interconnection networks; Index.