Rapid Prototyping of Digital Systems / Edition 1

Rapid Prototyping of Digital Systems / Edition 1

by James O. Hamblen, Michael D. Furman, Tyson S. Hall
     
 

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ISBN-10: 0387726705

ISBN-13: 9780387726700

Pub. Date: 10/26/2009

Publisher: Springer US

RAPID PROTOTYPING OF DIGITAL SYSTEMS provides an exciting and challenging environment for rapidly adapting System-on-a-Programmable Chip (SOPC) technology to existing designs or integrating the new design methods into a laboratory component for digital logic, computer and embedded-design curriculums.
New to this edition is an introduction to embedded operating

Overview

RAPID PROTOTYPING OF DIGITAL SYSTEMS provides an exciting and challenging environment for rapidly adapting System-on-a-Programmable Chip (SOPC) technology to existing designs or integrating the new design methods into a laboratory component for digital logic, computer and embedded-design curriculums.
New to this edition is an introduction to embedded operating systems for SOPC designs.
Featuring four accelerated tutorials on the Quartus II and Nios II design environments, this edition progresses from introductory programmable logic to full-scale SOPC design seamlessly integrating hardware implementation, software development, operating system support, state-of-the-art I/O, and IP cores.
This edition features Altera's new 7.1 Quartus II CAD and Nios II SOPC tools and includes projects for Altera's DE1, DE2, UP3, UP2, and UP1 FPGA development boards.

Product Details

ISBN-13:
9780387726700
Publisher:
Springer US
Publication date:
10/26/2009
Edition description:
2008
Pages:
411
Product dimensions:
10.00(w) x 7.00(h) x 0.88(d)

Table of Contents

1. Tutorial I: The Minute Design. 2. The Altera UP 1 CPLD Board. 3. Programmable Logic Technology. 4. Tutorial II: Sequential Design and Hierarchy. 5. UP1core Library Functions. 6. Using VHDL for Synthesis of Digital Hardware. 7. State Machine Design: The Electric Train Controller. 8. A Simple Computer Design: The muP 1. 9. VGA Video Display Generation. 10. Communications: Interfacing to the PS/2 Keyboard. 11. Communications: Interfacing to the PS/2 Mouse. 12. Robotics: The UP1-bot. 13. A RISC Design: Synthesis of the MIPS Processor Core. Appendix A: Generation of Pseudo Random Binary Sequences Appendix B: MAX+PLUS II Design and Data File Extensions Appendix C: UP I Pin Assignments. Glossary. Index

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