Rapid Prototyping of Digital Systems / Edition 1

Rapid Prototyping of Digital Systems / Edition 1

by James O. Hamblen, Michael D. Furman, Tyson S. Hall
     
 

ISBN-10: 0387726705

ISBN-13: 9780387726700

Pub. Date: 10/26/2009

Publisher: Springer US

RAPID PROTOTYPING OF DIGITAL SYSTEMS provides an exciting and challenging environment for rapidly adapting System-on-a-Programmable Chip (SOPC) technology to existing designs or integrating the new design methods into a laboratory component for digital logic, computer and embedded-design curriculums.
New to this edition is an introduction to embedded operating

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Overview

RAPID PROTOTYPING OF DIGITAL SYSTEMS provides an exciting and challenging environment for rapidly adapting System-on-a-Programmable Chip (SOPC) technology to existing designs or integrating the new design methods into a laboratory component for digital logic, computer and embedded-design curriculums.
New to this edition is an introduction to embedded operating systems for SOPC designs.
Featuring four accelerated tutorials on the Quartus II and Nios II design environments, this edition progresses from introductory programmable logic to full-scale SOPC design seamlessly integrating hardware implementation, software development, operating system support, state-of-the-art I/O, and IP cores.
This edition features Altera's new 7.1 Quartus II CAD and Nios II SOPC tools and includes projects for Altera's DE1, DE2, UP3, UP2, and UP1 FPGA development boards.

Product Details

ISBN-13:
9780387726700
Publisher:
Springer US
Publication date:
10/26/2009
Edition description:
2008
Pages:
411
Sales rank:
1,326,661
Product dimensions:
10.00(w) x 7.00(h) x 0.88(d)

Table of Contents

1Tutorial I : the 15 minute design2
2The Altera UP 3 board36
3Programmable logic technology44
4Tutorial II : sequential design and hierarchy62
5UP3core library functions74
6Using VHDL for synthesis of digital hardware88
7Using Verilog for synthesis of digital hardware112
8State machine design : the electric train controller130
9A simple computer design : the [mu]P 3148
10VGA video display generation168
11Interfacing to the PS/2 keyboard and mouse188
12Legacy digital I/O interfacing standards206
13UP 3 robotics projects216
14A RISC design : synthesis of the MIPS processor core256
15Introducing system-on-a-programmable-chip282
16Tutorial III : Nios II processor software development294
17Tutorial IV : Nios II processor hardware design324
App. AGeneration of pseudo random binary sequences345
App. BQuartus II design and data file extensions347
App. CUP 3 pin assignments349
App. DASCII character code355
App. EProgramming the UP 3's flash memory357

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