Robustness and Usability in Modern Design Flows / Edition 1

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The size of technically producible integrated circuits increases continuously, but the ability to design and verify these circuits does not keep up. Therefore today’s design flow has to be improved. Using a visionary approach, this book analyzes the current design methodology and verification methodology, a number of deficiencies are identified and solutions suggested. Improvements in the methodology as well as in the underlying algorithms are proposed.

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Editorial Reviews

From the Publisher
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“The authors, Gorschwin Fey and Rolf Drechsler, have identified several deficiencies in the design steps and manual fault diagnosis and have proposed a number of methods to alleviate the problems. … The book is a useful contribution to circuit design productivity and reliability.”­­­ (Nirode C. Mohanty, Zentralblatt MATH, Vol. 1198, 2010)

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Product Details

  • ISBN-13: 9781402065354
  • Publisher: Springer Netherlands
  • Publication date: 1/11/2008
  • Edition description: 2008
  • Edition number: 1
  • Pages: 166
  • Product dimensions: 9.21 (w) x 6.14 (h) x 0.50 (d)

Meet the Author

Prof. Rolf Drechsler has authored and edited numerous books for Springer

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Table of Contents

Dedication. List of Figures. List of Tables. Preface.

1. Introduction.

2. Preliminaries. 2.1 Boolean Reasoning. 2.2 Circuits. 2.3 Formal Verification. 2.4 Automatic Test Pattern Generation.

3. Algorithms and Data Structures. 3.1 Combining SAT and BDD Provers. 3.2 Summary and Future Work.
4. Synthesis. 4.1 Synthesis of SystemC. 4.2 Synthesis for Testability. 4.3 Summary and Future Work.

5. Property Generation. 5.1 Detecting Gaps in Testbenches. 5.2 Design Understanding. 5.3 Summary and Future Work.

6. Diagnosis. 6.1 Comparing SAT-based and Simulation-based Approaches. 6.2 Generating Counterexamples for Diagnosis. 6.3 Debugging Properties. 6.4 Summary and Future Work.

7. Summary and Conclusions.

References. Index of Symbols. Index.

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