SIMD Programming Manual for Linux and Windows
A number of widely used contemporary processors have instruction-set extensions for improved performance in multi-media applications. The aim is to allow operations to proceed on multiple pixels each clock cycle. Such instruction-sets have been incorporated both in specialist DSPchips such as the Texas C62xx (Texas Instruments, 1998) and in general purpose CPU chips like the Intel IA32 (Intel, 2000) or the AMD K6 (Advanced Micro Devices, 1999). These instruction-set extensions are typically based on the Single Instruc­ tion-stream Multiple Data-stream (SIMD) model in which a single instruction causes the same mathematical operation to be carried out on several operands, or pairs of operands, at the same time. The level or parallelism supported ranges from two floating point operations, at a time on the AMD K6 architecture to 16 byte operations at a time on the Intel P4 architecture. Whereas processor architectures are moving towards greater levels of parallelism, the most widely used programming languages such as C, Java and Delphi are structured around a model of computation in which operations takeplace on a single value at a time. This was appropriate when processors worked this way, but has become an impediment to programmers seeking to make use of the performance offered by multi-media instruction -sets. The introduction of SIMD instruction sets (Peleg et al.
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SIMD Programming Manual for Linux and Windows
A number of widely used contemporary processors have instruction-set extensions for improved performance in multi-media applications. The aim is to allow operations to proceed on multiple pixels each clock cycle. Such instruction-sets have been incorporated both in specialist DSPchips such as the Texas C62xx (Texas Instruments, 1998) and in general purpose CPU chips like the Intel IA32 (Intel, 2000) or the AMD K6 (Advanced Micro Devices, 1999). These instruction-set extensions are typically based on the Single Instruc­ tion-stream Multiple Data-stream (SIMD) model in which a single instruction causes the same mathematical operation to be carried out on several operands, or pairs of operands, at the same time. The level or parallelism supported ranges from two floating point operations, at a time on the AMD K6 architecture to 16 byte operations at a time on the Intel P4 architecture. Whereas processor architectures are moving towards greater levels of parallelism, the most widely used programming languages such as C, Java and Delphi are structured around a model of computation in which operations takeplace on a single value at a time. This was appropriate when processors worked this way, but has become an impediment to programmers seeking to make use of the performance offered by multi-media instruction -sets. The introduction of SIMD instruction sets (Peleg et al.
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SIMD Programming Manual for Linux and Windows

SIMD Programming Manual for Linux and Windows

SIMD Programming Manual for Linux and Windows

SIMD Programming Manual for Linux and Windows

Paperback(Softcover reprint of hardcover 1st ed. 2004)

$159.00 
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Overview

A number of widely used contemporary processors have instruction-set extensions for improved performance in multi-media applications. The aim is to allow operations to proceed on multiple pixels each clock cycle. Such instruction-sets have been incorporated both in specialist DSPchips such as the Texas C62xx (Texas Instruments, 1998) and in general purpose CPU chips like the Intel IA32 (Intel, 2000) or the AMD K6 (Advanced Micro Devices, 1999). These instruction-set extensions are typically based on the Single Instruc­ tion-stream Multiple Data-stream (SIMD) model in which a single instruction causes the same mathematical operation to be carried out on several operands, or pairs of operands, at the same time. The level or parallelism supported ranges from two floating point operations, at a time on the AMD K6 architecture to 16 byte operations at a time on the Intel P4 architecture. Whereas processor architectures are moving towards greater levels of parallelism, the most widely used programming languages such as C, Java and Delphi are structured around a model of computation in which operations takeplace on a single value at a time. This was appropriate when processors worked this way, but has become an impediment to programmers seeking to make use of the performance offered by multi-media instruction -sets. The introduction of SIMD instruction sets (Peleg et al.

Product Details

ISBN-13: 9781849969208
Publisher: Springer London
Publication date: 12/15/2010
Series: Springer Professional Computing
Edition description: Softcover reprint of hardcover 1st ed. 2004
Pages: 352
Product dimensions: 6.90(w) x 9.20(h) x 1.00(d)

Table of Contents

I SIMD Programming.- 1 Computer Speed, Program Speed.- 2 SIMD Instruction-sets.- 3 SIMD Programming in Assembler and C.- 4 Intel SIMD Instructions.- 5 3DNOW Instructions.- II SIMD Programming Languages.- 6 Another Approach: Data Parallel Languages.- 7 Basics of Vector Pascal.- 8 Algorithmic Features of Vector Pascal.- 9 User-defined Types.- 10 Input and Output.- 11 Permutations and Polymorphism.- III Programming Examples.- 12 Advanced Set Programming.- 13 Parallel Image Processing.- 14 Pattern Recognition and Image Compression.- 15 3D Graphics.- IV VIPER.- 16 Introduction to VIPER.- Appendix A Compiler Porting Tools.- A.1 Dependencies.- A.2 Compiler Structure.- A.2.1 Vectorisation.- A.2.2 Porting Strategy.- A.3 ILCG.- A.4 Supported Types.- A.4.1 Data Formats.- A.4.2 Typed Formats.- A.4.3 ref Types.- A.5 Supported Operations.- A.5.1 Type Casts.- A.5.2 Arithmetic.- A.5.3 Memory.- A.5.4 Assignment.- A.5.5 Dereferencing.- A.6 Machine Description.- A.6.1 Registers.- A.6.2 Register Sets.- A.6.3 Register Arrays.- A.6.4 Register Stacks.- A.6.5 Instruction Formats.- A.7 Grammar of ILCG.- A.8 ILCG Grammar.- A.8.1 Helpers.- A.8.2 Tokens.- A.8.3 Non-terminal Symbols.- Appendix B Software Download.- Appendix C Using the Command Line Compiler.- C.1 Invoking the Compiler.- C.1.1 Environment Variable.- C.1.2 Compiler Options.- C.1.3 Dependencies.- C.2 Calling Conventions.- C.3 Array Representation.- C.3.1 Range Checking.- References.
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