This book focusses on the spacer engineering aspects of novel MOS-based device–circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.
This book focusses on the spacer engineering aspects of novel MOS-based device–circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.
Spacer Engineered FinFET Architectures: High-Performance Digital Circuit Applications
154
Spacer Engineered FinFET Architectures: High-Performance Digital Circuit Applications
154Related collections and offers
Product Details
| ISBN-13: | 9781351751032 |
|---|---|
| Publisher: | CRC Press |
| Publication date: | 06/26/2017 |
| Sold by: | Barnes & Noble |
| Format: | eBook |
| Pages: | 154 |
| File size: | 3 MB |