System Level Design from HW/SW to Memory for Embedded Systems: 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Igua�u, Brazil, November 3-6, 2015, Proceedings

by Marcelo Gïtz, Gunar Schirner, Marco Aurïlio Wehrmeister, Mohammad Abdullah Al Faruque, Achim Rettberg

Overview

This book constitutes the refereed proceedings of the 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, held in Foz do Iguaçu, Brazil, in November 2015.

The 18 full revised papers presented were carefully reviewed and selected from 25 submissions. The papers present a broad discussion on the design, analysis and verification of embedded and cyber-physical systems including design methodologies, verification, performance analysis, and real-time systems design. They are organized in the following topical sections: cyber-physical systems, system-level design; multi/many-core system design; memory system design; and embedded HW/SW design and applications.

Product Details

ISBN-13:	9783319900223
Publisher:	Springer International Publishing
Publication date:	05/22/2018
Series:	IFIP Advances in Information and Communication Technology , #523
Edition description:	1st ed. 2017
Pages:	231
Product dimensions:	6.10(w) x 9.25(h) x (d)