The Student's Guide to VHDL / Edition 1

The Student's Guide to VHDL / Edition 1

by Peter J. Ashenden
     
 

ISBN-10: 1558605207

ISBN-13: 9781558605206

Pub. Date: 01/15/1998

Publisher: Elsevier Science

VHDL is a language for describing digital electronic systems. A vital, efficient step in the system design process, VHDL allows for the design and simulation of a hardware system prior to it actually being manufactured.
This new book provides a tutorial introduction to the fundamental modeling features of VHDL and shows how the features are used for the design

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Overview

VHDL is a language for describing digital electronic systems. A vital, efficient step in the system design process, VHDL allows for the design and simulation of a hardware system prior to it actually being manufactured.
This new book provides a tutorial introduction to the fundamental modeling features of VHDL and shows how the features are used for the design of digital systems.

Offering the same clear, accessible style as The Designer's Guide to VHDL, The Student's Guide is designed as a main text for introductory VHDL courses, and as a supplementary text for courses that require VHDL-based project work, such as computer architecture, digital design, and digital logic courses. This new condensed text also serves as a quick, self-teaching guide for practicing engineers who need to learn only the basics of VHDL.

* On-line resources include code for case studies.
* Numerous exercises that are coded for difficulty and expected solution time.
• Solutions to the level one exercises are included in the book for self-testing.
* An appendix citing the differences between the 1987 standard and the 1993 standard which is described in the book.

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Product Details

ISBN-13:
9781558605206
Publisher:
Elsevier Science
Publication date:
01/15/1998
Series:
Systems on Silicon Series
Edition description:
Older Edition
Pages:
312
Product dimensions:
7.44(w) x 9.18(h) x 0.74(d)

Table of Contents

Preface

1 Fundamental Concepts

2 Scalar Data Types and Operations

3 Sequential Statements

4 Composite Data Types and Operations

5 Basic Modeling Constructs

6 Subprograms

7 Packages and Use Clauses

8Resolved Signals

9 Generic Constants

10 Components and Configurations

A The Predefined Package Standard

B IEEE Standard 1164

C VHDL Syntax

D Differences Between VHDL-87 and VHDL-93

E Answers to Exercises

References

Index

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