Variation-Aware Analog Structural Synthesis: A Computational Intelligence Approach / Edition 1by Trent McConaghy, Pieter Palmers, Gao Peng, Michiel Steyaert
Pub. Date: 07/21/2009
Publisher: Springer Netherlands
Variation-Aware Analog Structural Synthesis describes computational intelligence-based tools for robust design of analog circuits. It starts with global variation-aware sizing and knowledge extraction, and progressively extends to variation-aware topology design. The computational intelligence techniques developed in this book generalize beyond analog CAD, to… See more details below
Variation-Aware Analog Structural Synthesis describes computational intelligence-based tools for robust design of analog circuits. It starts with global variation-aware sizing and knowledge extraction, and progressively extends to variation-aware topology design. The computational intelligence techniques developed in this book generalize beyond analog CAD, to domains such as robotics, financial engineering, automotive design, and more.
Table of ContentsPreface. Acronyms and Notation.
1. INTRODUCTION. 1.1 Motivation. 1.2 Background and Contributions to Analog CAD. 1.3 Background and Contributions to AI. 1.4 Analog CAD Is a Fruitfly for AI. 1.5 Conclusion.
2. VARIATION-AWARE SIZING: BACKGROUND. 2.1 Introduction and Problem Formulation. 2.2 Review of Yield Optimization Approaches. 2.3 Conclusion.
3. GLOBALLY RELIABLE, VARIATION-AWARE SIZING: SANGRIA. 3.1 Introduction. 3.2 Foundations: Model-Building Optimization (MBO). 3.3 Foundations: Shastic Gradient Boosting. 3.4 Foundations: Homotopy. 3.5 SANGRIA Algorithm. 3.6 SANGRIA Experimental Results. 3.7 On Scaling to Larger Circuits. 3.8 Conclusion.
4. KNOWLEDGE EXTRACTION IN SIZING: CAFFEINE. 4.1 Introduction and Problem Formulation. 4.2 Background: GP and Symbolic Regression. 4.3 CAFFEINE Canonical Form Functions. 4.4 CAFFEINE Search Algorithm. 4.5 CAFFEINE Results. 4.6 Scaling Up CAFFEINE: Algorithm. 4.7 Scaling Up CAFFEINE: Results. 4.8 Application: Behaviorial Modeling. 4.9 Application: Process-Variable Robustness Modeling. 4.10 Application: Design-Variable Robustness Modeling. 4.11 Application: Automated Sizing. 4.12 Application: Analytical Performance Tradeoffs. 4.13 Sensitivity To Search Algorithm. 4.14 Conclusion.
5. CIRCUIT TOPOLOGY SYNTHESIS: BACKGROUND. 5.1 Introduction. 5.2 Topology-Centric Flows. 5.3 Reconciling System-Level Design. 5.4 Requirements for a Topology Selection / Design Tool. 5.5 Open-Ended Synthesis and the Analog Problem Domain. 5.6 Conclusion.
6. TRUSTWORTHY TOPOLOGY SYNTHESIS: MOJITO SEARCH SPACE. 6.1 Introduction. 6.2 Search Space Framework. 6.3 A Highly Searchable Op Amp Library. 6.4 Operating-Point Driven Formulation. 6.5 Worked Example. 6.6 Size of Search Space. 6.7 Conclusion.
7. TRUSTWORTHY TOPOLOGY SYNTHESIS: MOJITO ALGORITHM. 7.1 Introduction. 7.2 High-Level Algorithm. 7.3 Search Operators. 7.4 Handling Multiple Objectives. 7.5 Generation of Initial Individuals. 7.6 Experimental Setup. 7.7 Experiment: Hit Target Topologies? 7.8 Experiment: Diversity? 7.9 Experiment: Human-Competitive Results? 7.10 Discussion: Comparison to Open-Ended Structural Synthesis. 7.11 Conclusion.
8. KNOWLEDGE EXTRACTION IN TOPOLOGY SYNTHESIS. 8.1 Introduction. 8.2 Generation of Database. 8.3 Extraction of Specs-To-Topology Decision Tree. 8.4 Global Nonlinear Sensitivity Analysis. 8.5 Extraction of Analytical Performance Tradeoffs. 8.6 Conclusion.
9. VARIATION-AWARE TOPOLOGY SYNTHESIS & KNOWLEDGE EXTRACTION. 9.1 Introduction. 9.2 Problem Specification. 9.3 Background. 9.4 Towards a Solution. 9.5 Proposed Approach: MOJITO-R. 9.6 MOJITO-R Experimental Validation. 9.7 Conclusion.
10. NOVEL VARIATION-AWARE TOPOLOGY SYNTHESIS. 10.1 Introduction. 10.2 Background. 10.3 MOJITO-N Algorithm and Results. 10.4 ISCLEs Algorithm And Results. 10.5 Conclusion.
11. CONCLUSION. 11.1 General Contributions. 11.2 Specific Contributions. 11.3 Future Work. 11.4 Final Remarks.
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