Verification by Error Modeling: Using Testing Techniques in Hardware Verification / Edition 1

Hardcover (Print)
Buy New
Buy New from
Used and New from Other Sellers
Used and New from Other Sellers
from $132.20
Usually ships in 1-2 business days
(Save 26%)
Other sellers (Hardcover)
  • All (6) from $132.20   
  • New (5) from $132.20   
  • Used (1) from $243.01   


Verification presents the most time-consuming task in the integrated circuit design process. The increasing similarity between implementation verification and the ever-needed task of providing vectors for manufacturing fault testing is tempting many professionals to combine verification and testing efforts. This book presents the basis for reusing the test vector generation and simulation for the purpose of implementation verification, to result in a significant timesaving. The book brings the results in the direction of merging manufacturing test vector generation and verification. It first discusses error fault models suitable for approaching the verification by testing methods. Then, it elaborates a proposal for an implicit fault model that uses the Arithmetic Transform representation of a circuit and the faults. Presented is the fundamental link between the error size and the test vector size, which allows parametrizable verification by test vectors. Furthermore, the test vector set is sufficient not only for detecting, but also for diagnosing and correcting the design errors. The practical use of any such simulation-based verification scheme can be seriously impaired by redundant faults, that otherwise require exhaustive simulations. The redundant fault identification methods are presented that are well suited for the type of faults considered. Finally, the same representation can be used to augment and expand the formal verification schemes that are to be used in conjunction with the simulation-based verification. The primary audience for Verification by Error Modeling includes researchers in verification and testing, managers in charge of verification of test and practicing engineers. Due to its comprehensive coverage of background topics, the book can also be used for teaching courses on verification and test topics.

Read More Show Less

Editorial Reviews

From the Publisher
From the reviews:

"This monograph presents, as its main contribution, methods to gain more confidence in verification by simulation. … The methods presented in this book may be suitable to verify gate level circuits which may have small modifications after automatic optimization or some manual interaction." (Reiner Kolla, Zentralblatt MATH, Vol. 1049 (24), 2004)

Read More Show Less

Product Details

  • ISBN-13: 9781402076527
  • Publisher: Springer US
  • Publication date: 11/30/2003
  • Series: Frontiers in Electronic Testing Series, #25
  • Edition description: 2003
  • Edition number: 1
  • Pages: 233
  • Product dimensions: 9.21 (w) x 6.14 (h) x 0.56 (d)

Table of Contents

1: Introduction. 1. Design flow. 2. Verification - approaches and problems. 3. Book objectives.
2: Boolean function representations. 1. Background - function representations. 2. Decision diagrams. 3. Spectral representations. 4. Arithmetic transform.
3: Don't cares and their calculation. 1. Incompletely specified Boolean functions. 2. Using don't cares for redundancy identification.
4: Testing. 1. Introduction. 2. Fault list reduction. 3. Overview of simulators. 4. Fault simulators. 5. Deterministic vector generation - ATPG. 6. Conclusions.
5: Design error models. 1. Introduction. 2. Design errors. 3. Explicit design error models. 4. Implicit error model precursors. 5. Additive implicit error model. 6. Design error detection and correction. 7. Conclusions.
6: Design verification by AT. 1. Introduction. 2. Detecting small AT errors. 3. Bounding error by Walsh transform. 4. Experimental results. 5. Conclusions.
7: Identifying redundant gate and wire replacements. 1. Introduction. 2. Gate replacement faults. 3. Redundancy detection by don't cares. 4.Exact redundant fault identification. 5. Identifying redundant wire replacements. 6. Exact wire redundancy identification. 7. I/O port replacement detection. 8. Experimental results. 9. Conclusions. Conclusions and further work. 1. Conclusions. 2. Future work.
Appendices. References. Index.

Read More Show Less

Customer Reviews

Be the first to write a review
( 0 )
Rating Distribution

5 Star


4 Star


3 Star


2 Star


1 Star


Your Rating:

Your Name: Create a Pen Name or

Barnes & Review Rules

Our reader reviews allow you to share your comments on titles you liked, or didn't, with others. By submitting an online review, you are representing to Barnes & that all information contained in your review is original and accurate in all respects, and that the submission of such content by you and the posting of such content by Barnes & does not and will not violate the rights of any third party. Please follow the rules below to help ensure that your review can be posted.

Reviews by Our Customers Under the Age of 13

We highly value and respect everyone's opinion concerning the titles we offer. However, we cannot allow persons under the age of 13 to have accounts at or to post customer reviews. Please see our Terms of Use for more details.

What to exclude from your review:

Please do not write about reviews, commentary, or information posted on the product page. If you see any errors in the information on the product page, please send us an email.

Reviews should not contain any of the following:

  • - HTML tags, profanity, obscenities, vulgarities, or comments that defame anyone
  • - Time-sensitive information such as tour dates, signings, lectures, etc.
  • - Single-word reviews. Other people will read your review to discover why you liked or didn't like the title. Be descriptive.
  • - Comments focusing on the author or that may ruin the ending for others
  • - Phone numbers, addresses, URLs
  • - Pricing and availability information or alternative ordering information
  • - Advertisements or commercial solicitation


  • - By submitting a review, you grant to Barnes & and its sublicensees the royalty-free, perpetual, irrevocable right and license to use the review in accordance with the Barnes & Terms of Use.
  • - Barnes & reserves the right not to post any review -- particularly those that do not follow the terms and conditions of these Rules. Barnes & also reserves the right to remove any review at any time without notice.
  • - See Terms of Use for other conditions and disclaimers.
Search for Products You'd Like to Recommend

Recommend other products that relate to your review. Just search for them below and share!

Create a Pen Name

Your Pen Name is your unique identity on It will appear on the reviews you write and other website activities. Your Pen Name cannot be edited, changed or deleted once submitted.

Your Pen Name can be any combination of alphanumeric characters (plus - and _), and must be at least two characters long.

Continue Anonymously

    If you find inappropriate content, please report it to Barnes & Noble
    Why is this product inappropriate?
    Comments (optional)