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Fatbrain Review'Still going' may sound like the commercial for Energizer batteries, however, in this case, the statement is true. Verilog HDL continues to prove its excellence in teaching Verilog hardware description language like no other book on the topic. Although it is intended for beginners and intermediate users, advanced users can use this book in conjunction with the manuals and training materials for Verilog-based products. Due to its extensive use in the design of integrated circuit chips and digital systems, Verilog has become an industry standard over the last few years.
This book gives a broad overview of Verilog-based topics, emphasizing practical design and synthesis, and complies with the IEEE 1364 Verilog HDL standard. Part 1 describes basic Verilog issues, and covers digital design principles with Verilog, design methodologies, lexical conventions, modules and ports, and related topics. Gate-level modeling is addressed before behavioral modeling so that a new user can easily move to higher levels of abstraction such as data flow and behavioral modeling.
Part 2 covers advanced topics in Verilog, including timing simulation, switch-level modeling, UPDs, PLI, and logic synthesis. The appendices constitute Part 3 of the book, and contain useful reference information such as strength-level modeling, a list of PLI routines, keywords, system tasks, compiler directives, formal syntax definition, Verilog tidbits, and large Verilog examples.
The book includes over 300 illustrations, exercises, and examples, and a Verilog Internet reference resource list. The chapters are furnished with objectives and summaries. The companion CD-ROM containsa Verilog simulator with a graphical user interface and the source code from the book.