VHDL Coding Styles and Methodologies / Edition 2

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VHDL Coding Styles and Methodologies, Second Edition is intended for p rofessional engineers as well as students. It is organized in thirteen chapters, each covering a separate aspect of the language, with compl ete examples. It provides a practical approach to learning VHDL. Combi ning methodologies and coding styles, along with VHDL rules, leads the reader in the right direction from the beginning.

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Editorial Reviews

An in-depth tutorial that covers both the language and coding methodologies, for college students and engineers. The volume is organized in four basic VHDL aspects: sequential language; concurrency; advanced topics; and applications. The language rules, coding styles, and methodologies presented support the structure necessary to create digital hardware designs and models that are readable, maintainable, predictable, and efficient. The accompanying disk contains all of the VHDL code presented in the chapters. Annotation c. Book News, Inc., Portland, OR (booknews.com)
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Product Details

  • ISBN-13: 9780792384748
  • Publisher: Springer US
  • Publication date: 3/31/1999
  • Edition description: 2nd ed. 1999
  • Edition number: 2
  • Pages: 455
  • Product dimensions: 6.90 (w) x 10.20 (h) x 1.40 (d)

Table of Contents

Preface. 1.0. VHDL Overview and Concepts. 2.0. Basic Language Elements. 3.0. Control Structures. 4.0. Drivers. 5.0. VHDL Timing. 6.0. Elements of Entity/Architecture. 7.0. Subprograms. 8.0. Packages. 9.0. User Defined Attributes, Specifications, and Configurations. 10.0. Design for Synthesis. 11.0. Functional Models and Testbenches. 12.0. UART Project. Appendix A: VHDL 93 and VHDL 87 Syntax Summary. Appendix B: Package Standard. Appendix C: Package Textio. Appendix D: STD_Logic_Textio. Appendix E: Package STD_Logic_1164. Appendix F: Numeric_STD. Appendix G: STD_Logic_Unsigned. Appendix H: STD_Logic_Signed. Appendix I: STD_Logic_Arith. Appendix J: STD_Logic_Misc. Appendix K: VHDL Predefined Attributes. Index.
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