VLSI for Pattern Recognition and Image Processing

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Product Details

  • ISBN-13: 9783642475276
  • Publisher: Springer Berlin Heidelberg
  • Publication date: 4/19/2012
  • Series: Springer Series in Information Sciences , #13
  • Edition description: Softcover reprint of the original 1st ed. 1984
  • Edition number: 1
  • Pages: 252
  • Product dimensions: 6.14 (w) x 9.21 (h) x 0.53 (d)

Table of Contents

1.1 VLSI System.- 1.2 VLSI Algorithms.- 1.3 Summary of Book.- References.- I General VLSI Design Considerations.- 2. One-Dimensional Systolic Arrays for Multidimensional Convolution and Resampling.- 2.1 Background.- 2.2 Systolic Convolution Arrays.- 2.3 Variants in the Convolution Problem.- 2.4 Implementation.- 2.5 Concluding Remarks.- References.- 3. VLSI Arrays for Pattern Recognition and Image Processing: I/O Bandwidth Considerations.- 3.1 Background.- 3.2 Arrays for Matrix Operations.- 3.3 Arrays for Pattern Analysis.- 3.4 Image-Processing Array.- 3.5 Conclusions.- References.- II VLSI Systems for Pattern Recognition.- 4. VLSI Arrays for Minimum-Distance Classifications.- 4.1 Minimum-Distance Classification.- 4.2 Vector Distances.- 4.3 String Distances.- 4.4 Examples of Application.- 4.5 Summary.- References.- 5. Design of a Pattern Cluster Using Two-Level Pipelined Systolic Array.- 5.1 Background.- 5.2 Description of Squared-Error Pattern Clustering.- 5.3 The Systolic Pattern Clustering Array.- 5.4 System Operating Characteristics.- 5.5 Conclusion.- References.- 6. VLSI Arrays for Syntactic Pattern Recognition.- 6.1 Pattern Description and Recognition.- 6.2 Syntactic Pattern Recognition.- 6.3 VLSI Implementation.- 6.4 Simulation and Examples.- 6.5 Concluding Remarks.- References.- III VLSI Systems for Image Processing.- 7. Concurrent Systems for Image Analysis.- 7.1 Background.- 7.2 Processing Requirements for Image Analysis.- 7.3 Concurrent VLSI Architectures.- 7.4 Conclusions.- References.- 8. VLSI Wavefront Arrays for Image Processing.- 8.1 Background.- 8.2 Parallel Computers for Image Processing.- 8.3 Design of Pipelined Array Processors.- 8.4 Image-Processing Applications.- 8.5 Wafer-Scale Integrated System.- 8.6 Conclusion.- References.- 9. Curve Detection in VLSI.- 9.1 Background.- 9.2 Montanari’s Algorithm.- 9.3 Systolic Architectures.- 9.4 A VLSI Design of the Column Pipeline Chip.- 9.5 SIMD Array Algorithm.- 9.6 Concluding Remarks.- References.- 10. VLSI Implementation of Cellular Logic Processors.- 10.1 Cellular Logic Processors.- 10.2 Binary Neighborhood Functions.- 10.3 CELLSCAN.- 10.4 The Golay Parallel Pattern Transform.- 10.5 The diff3-GLOPR.- 10.6 The Preston-Herron Processor (PHP).- 10.7 The LSI/PHP.- References.- 11. Design of VLSI Based Multicomputer Architecture for Dynamic Scene Analysis.- 11.1 Background.- 11.2 Dynamic Scene Analysis Algorithm.- 11.3 Existing Multicomputer Architecture.- 11.4 Scheduling and Parameters of Interest.- 11.5 Performance Evaluation.- 11.6 Conclusion.- References.- 12. VLSI-Based Image Resampling for Electronic Publishing.- 12.1 Introduction to the “Electronic Darkroom”.- 12.2 Overview of System Design Concepts.- 12.3 Resampling Algorithms.- 12.4 System Architecture and Performance.- 12.5 Trade-Offs and Conclusions.- References.

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