VLSI Placement and Routing: The PI Project / Edition 1

by Alan T. Sherman

Overview

This book provides a superb introduction to and overview of the MIT PI System for custom VLSI placement and routing. Alan Sher­ man has done an excellent job of collecting and clearly presenting material that was previously available only in various theses, confer­ ence papers, and memoranda. He has provided here a balanced and comprehensive presentation of the key ideas and techniques used in PI, discussing part of his own Ph. D. work (primarily on the place­ ment problem) in the context of the overall design of PI and the contributions of the many other PI team members. I began the PI Project in 1981 after learning first-hand how dif­ ficult it is to manually place modules and route interconnections in a custom VLSI chip. In 1980 Adi Shamir, Leonard Adleman, and I designed a custom VLSI chip for performing RSA encryp­ tion/decryption [226]. I became fascinated with the combinatorial and algorithmic questions arising in placement and routing, and be­ gan active research in these areas. The PI Project was started in the belief that many of the most interesting research issues would arise during an actual implementation effort, and secondarily in the hope that a practically useful tool might result. The belief was well-founded, but I had underestimated the difficulty of building a large easily-used software tool for a complex domain; the PI soft­ ware should be considered as a prototype implementation validating the design choices made.

Product Details

ISBN-13:	9781461396604
Publisher:	Springer New York
Publication date:	01/16/2012
Series:	Monographs in Computer Science
Edition description:	Softcover reprint of the original 1st ed. 1989
Pages:	189
Product dimensions:	6.10(w) x 9.25(h) x 0.02(d)

Table of Contents

1 Introduction.- 1.1 How PI Lays Out a Chip: An Example.- 2 Preliminaries.- 2.1 Specifications for the PI System.- 2.2 Terminology.- 3 The Placement Framework.- 3.1 Overview of PI’s Placement Heuristics.- 3.2 PI’s Placement Problem.- 3.3 The Placement Tree.- 3.4 How PI Refines the Placement Tree.- 4 Chip Estimation and Pad Placement.- 4.1 Estimating Chip Size and Shape.- 4.2 Pad Placement.- 5 Logic Placement.- 5.1 Top-Down Mincut Partitioning.- 5.2 Module Orientation.- 5.3 Bottom-Up Hardening.- 5.4 Additional Placement Heuristics.- 5.5 Open Placement Problems.- 6 Power-Ground Routing.- 6.1 Overview of Power-Ground Routing.- 6.2 The Hamiltonian Circuit Heuristic.- 6.3 Calculating Current Requirements.- 7 Signal Routing.- 7.1 Overview of Signal Routing.- 7.2 Channel Definition.- 7.3 Global Routing.- 7.4 Crossing Placement.- 7.5 Channel Routing.- 8 Resizing.- 8.1 Overview of Resizing.- 8.2 Gathering the Constraints.- 8.3 Solving the Constraint Graphs.- 8.4 How PI Converges on a Solution.- 9 The MIT Implementation of PI.- 9.1 Objectives.- 9.2 Major Design Decisions.- 9.3 Critique.- 9.4 Source Code, Contributors, and Documentation..- 10 Related Layout Systems.- 10.1 2PI at General Electric.- 10.2 EC-PI at the Technion.- 10.3 Selected Other Layout Systems.- 11 Conclusion.- Basic Sources.- Mathematics and Computer Science.- VLSI Theory.- Placement.- Routing.- Compaction.- The PI System.- Other Placement and Routing Systems.- Layouts of Specific Circuits.- Other Works.

Editorial Reviews

PI (placement and interconnect) is an experimental system for laying out custom VLSI chips, designed and developed at MIT. The present volume provides a current account of this project, and describes both the original system as well as implementations. Acidic paper. Annotation c. Book News, Inc., Portland, OR (booknews.com)

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