Digital Signal Processing Implementation Using the TM320C6000 DSP Platform

Digital Signal Processing Implementation Using the TM320C6000 DSP Platform

by Naim Dahnoun

Other Format(1 ED)

$65.00

Overview

This text is a vital accessory to both students and professionals using the latest TI DSP processors. The DSP processor has become an integral component in a variety of digital communications systems including cellular telephone systems, data modems, and wireless data devices. Texas Instruments recently launched its new line of high-performance DSP processors (the TMS320C6000) which achieve a significant performance improvement over conventional processors. This text is aimed at DSP users who need to implement systems with the new family of high-performance TI processors. It describes the architecture of the processors as well as detailing the associated tools and providing practical examples. Using practical experiments based on common DSP operations, this book enables the reader to make real-time applications work in a relatively short period of time.

Product Details

ISBN-13: 9780201619164
Publisher: Pearson Education
Publication date: 10/25/2000
Edition description: 1 ED
Pages: 234
Product dimensions: 6.42(w) x 9.46(h) x 0.74(d)

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PREFACE:

Preface

Digital signal processing techniques are now so powerful that sometimes it is extremely difficult, if not impossible, for analogue signal processing to achieve the same or closer performance. Added to this, digital signal processors are very affordable and include good development tools and support. This is sufficient to explain the growing number of areas of application for DSP, including motor drives, communications, biomedical instrumentation and automotive applications.

Having dealt for some time with undergraduate and postgraduate students, researchers and digital signal processor users in general, I have found that first-time users of DSP find a barrier obstructing them in progressing from theory to the full implementation of algorithms.

When it comes to implementing an algorithm many questions arise, questions such as:

  • Which processor to use - fixed or floating point?
  • Which manufacturer to choose?
  • Which application hardware to use?
  • How many I/O interfaces are needed and how fast should they be?

When these questions are answered, more questions arise regarding the implementation on the specific processor and hardware selected. In this book, use of the TMS320C6000 will be justified, and the hardware and complete implementation of selected algorithms will be dealt with in detail. Material used for the teaching of undergraduate and postgraduate students, along with laboratory experiments, are used to demonstrate and simplify the transition from theory to the full implementation on the TMS320C6201 processor.

This book is divided into nine chapters. Chapters 2and 3 are very important and it is advisable that they are well understood before progressing onto subsequent chapters.

Chapter 1 Introduction
This introductory chapter provides the reader with general knowledge on general-purpose DSP processors and also provides an up-to-date TMS320 roadmap showing the evolution of Texas Instruments' DSP chips in terms of processing power.

Chapter 2 The TMS320C62xxlC67xx architecture
The objective of this chapter is to provide a comprehensive description of the 'C6x architecture. This includes a detailed description of the Central Processing Unit (CPU) and program control along with an overview of the memory organisation, serial ports, boot function and internal timer.

Chapter 3 Software development tools and TMS32OC6201 EVM overview
This chapter is divided into three main parts. The first part describes the software development tools, the second part describes the Evaluation Module (EVM) and, finally, the third part describes the codec, and use of interrupts along with some useful programs for testing the TMS320C6201 EVM.

Chapter 4 Software optimisation
To introduce the need for code optimisation, this chapter starts by developing the concept of pipelining. Since the TMS320C62xx and the TMS320C67xx each have eight units, which are dedicated to different operations, and since different instructions can have different latencies, the programmer or the tools are left with the burden of scheduling the code. Backed by examples, this chapter explains the different techniques used to optimise DSP code on these processors.

Chapter 5 Finite Impulse Response (FIR) filter implementation
The purpose of this chapter is twofold. Primarily, it shows how to design an FIR filter and implement it on the TMS320C62xx processor, and secondly, it shows how to optimise the code as discussed in Chapter 4. This chapter discusses the interface between C and assembly, how to use intrinsics, and how to put into practice material that has been covered in the previous chapters.

Chapter 6 Infinite Impulse Response (IIR) filter implementation
This chapter introduces the IIR filters and describes two popular design methods, that is the bilinear and the impulse invariant methods. Step by step, this chapter shows the procedures necessary to implement typical IIR filters specified by their transfer functions. Finally, this chapter provides complete implementation of an IIR filter in C language, assembly and linear assembly, and shows how to interface C with linear assembly.

Chapter 7 Adaptive filter implementation
This chapter starts by introducing the need for an adaptive filter in communications. It then shows how to calculate the filter coefficients using the Mean Square Error (MSE) criterion, exposes the Least Mean Square (LMS) algorithm and, finally, shows how the LMS algorithm is implemented in both C and assembly.

Chapter 8 Goertzel algorithm implementation
This chapter deals with Dual Tone Multi-Frequency (DTMF) detection and provides a practical example of the Goertzel algorithm. This chapter also shows how to produce optimised code by the pen and paper method, describes linear assembly and demonstrates how to program the Direct Memory Access (DMA).

Chapter 9 Implementation of the Discrete Cosine Transform
This chapter starts by introducing the need for video compression to reduce the channel bandwidth requirement, then explains the Joint Photographic Experts Group (JPEG) image codec. This includes a detailed discussion and the implementation of the Discrete Cosine Transform (DCT) and Inverse Discrete Cosine Transform (IDCT) and concentrates on their optimisation. An explanation of the PC-DSP communication via the PCI bus is also provided.

Software

The accompanying CD includes all the programs used in this book. To help the reader in locating or viewing the files, an Index.htm file has been included. The files are in separate directories corresponding to each chapter. Some directories are further divided in sub-directories to separate different implementations. Batch files for compiling, assembling and linking these programs are included. All the files have been tested (the environment may need to be modified: see env.bat file). Software using Code Composer Studio environment is also provided. Software updates including code running on the TMS320C6211 DSK can be obtained from the Publisher.

Acknowledgements

As you can imagine, it is hard to produce any textbook on state-of-the-art technology, especially when the time factor is playing against you. However, with the first very encouraging comments from the five anonymous reviewers, my motivation for writing this book surged, and therefore I would like to thank them for their constructive comments.

Due to the unfamiliarity with this processor, it was difficult to share ideas with other users. But with Tuan-Kiang Chiew, Kwee-Tong Heng and Michael Hart many problems were solved and many grey areas were clarified; I extend to them special thanks.

I am indebted to Robert Owen, Hans Peter Blaettel, Gene Frantz, Neville Bulsara, Greg Peake, Helga and Graham Stevenson and Maria Ho of Texas Instruments for their encouragement, continuous help and support. I owe my thanks to Professor Barrie Jones, Professor David Evans, Dr. John Fothergill and Fernando Schlindwein from Leicester University for their encouragement, and Dr Anthony Brooms from Oxford University and Dr Mark Yoder from the Rose-Hulman Institute of Technology, USA, for reviewing the material.

My thanks to all of my colleagues at the Department of Engineering at Bristol University and to all of our students, in particular Khaled, Fernando, Mohamed, Samir, Chris, Shirley and Julian. Also I would like to thank Cornelius Kellerhoff, European DSP Business Development Consultant, Paul Coulton, Communications Research Centre, Lancaster University, and Mariusz Jankowski, University of Southern Maine, for their valuable technical reviews.

I thank my parents, family and friends for their support and encouragement.

Finally, many thanks to Karen Sutherland, Julie Knight and all of the Pearson Education and Prentice Hall team who were very kind, supportive and encouraging.

N. Dahnoun
Naim.Dahnoun@Bristol.ac.uk

Table of Contents

Prefacexi
Acknowledgementsxiv
Chapter 1Introduction1
1.1Introduction1
1.2Why do we need DSP processors?2
1.3How do we define real-time?2
1.4What are the typical DSP algorithms?2
1.5Who are the main general-purpose DSP processor manufacturers?3
1.6Parameters to be considered when choosing a DSP processor5
1.7General-purpose DSP vs DSP in ASIC6
1.8DSP market7
1.9The TMS320 family evolution7
Chapter 2The TMS320C6000 architecture8
2.1Overview8
2.2The Central Processing Unit (CPU)9
2.2.1Program control unit10
2.2.2CPU data paths11
2.2.3Program execute units15
2.2.4Control registers18
2.2.5Register files18
2.3Memory20
2.3.1Data memory access20
2.3.2Internal memory organisation for the 'C6201 Rev.223
2.3.3Direct Memory Access (DMA) controller24
2.4Serial ports25
2.5Host Port Interface25
2.6Boot function26
2.7Internal timers26
2.8'C62xx/'C67xx interrupts27
2.8.1Reset (RESET)28
2.8.2NonMaskable Interrupt (NMI)28
2.8.3Maskable interrupts (INT4-INT15)29
2.9Instruction set37
2.9.1Writing Assembly code38
Chapter 3Software development tools and TMS320C6201 EVM overview40
3.1Introduction40
3.2Software development tools40
3.2.1Compiler41
3.2.2Assembler42
3.2.3Linker43
3.2.4Compile, assemble and link45
3.3TMS320C6201 Evaluation Module, EVM45
3.3.1EVM features45
3.3.2Using interrupts46
3.3.3Stereo codec overview48
3.3.4Configuring and using the internal timers51
3.3.5Testing the EVM52
Chapter 4Software optimisation57
4.1Introduction57
4.1.1Code optimisation procedure57
4.1.2The C compiler options59
4.2Assembly optimisation60
4.2.1Parallel instructions61
4.2.2Removing the NOPs62
4.2.3Loop unrolling63
4.2.4Word access63
4.2.5Optimisation summary64
4.3Software pipelining64
4.3.1Software pipelining procedure65
4.4Linear assembly73
4.4.1Trip count75
Chapter 5Finite Impulse Response (FIR) filter implementation79
5.1Introduction79
5.2Properties of an FIR filter79
5.2.1Filter coefficients79
5.2.2Frequency response of an FIR filter80
5.2.3Phase linearity of an FIR filter81
5.3Design procedure82
5.3.1Specifications82
5.3.2Coefficients calculation83
5.3.3Realisation structure89
5.3.4Filter implementation93
Chapter 6Infinite Impulse Response (IIR) filter implementation114
6.1Introduction114
6.2Design procedure115
6.3Coefficients calculation115
6.3.1Pole-zero placement approach115
6.3.2Analogue to digital filter design116
6.3.3Bilinear transform (BZT) method116
6.3.4Impulse invariant method126
6.4IIR filter implementation131
6.5Testing the designed IIR filter137
Chapter 7Adaptive filter implementation138
7.1Introduction138
7.2Mean square error (MSE)139
7.3Least mean square (LMS)140
7.4Implementation of an adaptive filter using the LMS algorithm141
Chapter 8Goertzel algorithm implementation152
8.1Introduction152
8.2Modified Goertzel algorithm153
8.3Implementing the modified Goertzel algorithm156
8.4Algorithm optimisation160
8.4.1Hand optimisation of the Goertzel algorithm160
8.4.2Optimisation by using linear assembly164
8.5Direct Memory Access (DMA)166
8.5.1DMA features167
8.6Practical example for programming the DMA169
Chapter 9Implementation of the Discrete Cosine Transform173
9.1Introduction173
9.2Optimisation of DCT and IDCT for DSP implementation176
9.2.1Two-dimensional DCT using a one-dimensional DCT pair176
9.3Block-based DCT and IDCT in C178
9.4Simple DSP implementation of DCT and IDCT on an image180
9.4.1McGovern Fast 1-D DCT and IDCT186
9.5TMS320C6201 EVM-PC host communication194
9.5.1Communication through the mailbox195
9.5.2Communication through the FIFOs196
9.5.3Demonstration program197
Appendix AOptimisation of 1-D DCT and IDCT213
A.11-D DCT (DCT)213
A.21-D Inverse DCT (IDCT)222
A.3Application in 2-D DCT225
Appendix BBlock memory display226
References229
Index231

Preface

PREFACE:

Preface

Digital signal processing techniques are now so powerful that sometimes it is extremely difficult, if not impossible, for analogue signal processing to achieve the same or closer performance. Added to this, digital signal processors are very affordable and include good development tools and support. This is sufficient to explain the growing number of areas of application for DSP, including motor drives, communications, biomedical instrumentation and automotive applications.

Having dealt for some time with undergraduate and postgraduate students, researchers and digital signal processor users in general, I have found that first-time users of DSP find a barrier obstructing them in progressing from theory to the full implementation of algorithms.

When it comes to implementing an algorithm many questions arise, questions such as:

  • Which processor to use - fixed or floating point?
  • Which manufacturer to choose?
  • Which application hardware to use?
  • How many I/O interfaces are needed and how fast should they be?

When these questions are answered, more questions arise regarding the implementation on the specific processor and hardware selected. In this book, use of the TMS320C6000 will be justified, and the hardware and complete implementation of selected algorithms will be dealt with in detail. Material used for the teaching of undergraduate and postgraduate students, along with laboratory experiments, are used to demonstrate and simplify the transition from theory to the full implementation on the TMS320C6201 processor.

This book is divided into nine chapters. Chapters2and 3 are very important and it is advisable that they are well understood before progressing onto subsequent chapters.

Chapter 1 Introduction
This introductory chapter provides the reader with general knowledge on general-purpose DSP processors and also provides an up-to-date TMS320 roadmap showing the evolution of Texas Instruments' DSP chips in terms of processing power.

Chapter 2 The TMS320C62xxlC67xx architecture
The objective of this chapter is to provide a comprehensive description of the 'C6x architecture. This includes a detailed description of the Central Processing Unit (CPU) and program control along with an overview of the memory organisation, serial ports, boot function and internal timer.

Chapter 3 Software development tools and TMS32OC6201 EVM overview
This chapter is divided into three main parts. The first part describes the software development tools, the second part describes the Evaluation Module (EVM) and, finally, the third part describes the codec, and use of interrupts along with some useful programs for testing the TMS320C6201 EVM.

Chapter 4 Software optimisation
To introduce the need for code optimisation, this chapter starts by developing the concept of pipelining. Since the TMS320C62xx and the TMS320C67xx each have eight units, which are dedicated to different operations, and since different instructions can have different latencies, the programmer or the tools are left with the burden of scheduling the code. Backed by examples, this chapter explains the different techniques used to optimise DSP code on these processors.

Chapter 5 Finite Impulse Response (FIR) filter implementation
The purpose of this chapter is twofold. Primarily, it shows how to design an FIR filter and implement it on the TMS320C62xx processor, and secondly, it shows how to optimise the code as discussed in Chapter 4. This chapter discusses the interface between C and assembly, how to use intrinsics, and how to put into practice material that has been covered in the previous chapters.

Chapter 6 Infinite Impulse Response (IIR) filter implementation
This chapter introduces the IIR filters and describes two popular design methods, that is the bilinear and the impulse invariant methods. Step by step, this chapter shows the procedures necessary to implement typical IIR filters specified by their transfer functions. Finally, this chapter provides complete implementation of an IIR filter in C language, assembly and linear assembly, and shows how to interface C with linear assembly.

Chapter 7 Adaptive filter implementation
This chapter starts by introducing the need for an adaptive filter in communications. It then shows how to calculate the filter coefficients using the Mean Square Error (MSE) criterion, exposes the Least Mean Square (LMS) algorithm and, finally, shows how the LMS algorithm is implemented in both C and assembly.

Chapter 8 Goertzel algorithm implementation
This chapter deals with Dual Tone Multi-Frequency (DTMF) detection and provides a practical example of the Goertzel algorithm. This chapter also shows how to produce optimised code by the pen and paper method, describes linear assembly and demonstrates how to program the Direct Memory Access (DMA).

Chapter 9 Implementation of the Discrete Cosine Transform
This chapter starts by introducing the need for video compression to reduce the channel bandwidth requirement, then explains the Joint Photographic Experts Group (JPEG) image codec. This includes a detailed discussion and the implementation of the Discrete Cosine Transform (DCT) and Inverse Discrete Cosine Transform (IDCT) and concentrates on their optimisation. An explanation of the PC-DSP communication via the PCI bus is also provided.

Software

The accompanying CD includes all the programs used in this book. To help the reader in locating or viewing the files, an Index.htm file has been included. The files are in separate directories corresponding to each chapter. Some directories are further divided in sub-directories to separate different implementations. Batch files for compiling, assembling and linking these programs are included. All the files have been tested (the environment may need to be modified: see env.bat file). Software using Code Composer Studio environment is also provided. Software updates including code running on the TMS320C6211 DSK can be obtained from the Publisher.

Acknowledgements

As you can imagine, it is hard to produce any textbook on state-of-the-art technology, especially when the time factor is playing against you. However, with the first very encouraging comments from the five anonymous reviewers, my motivation for writing this book surged, and therefore I would like to thank them for their constructive comments.

Due to the unfamiliarity with this processor, it was difficult to share ideas with other users. But with Tuan-Kiang Chiew, Kwee-Tong Heng and Michael Hart many problems were solved and many grey areas were clarified; I extend to them special thanks.

I am indebted to Robert Owen, Hans Peter Blaettel, Gene Frantz, Neville Bulsara, Greg Peake, Helga and Graham Stevenson and Maria Ho of Texas Instruments for their encouragement, continuous help and support. I owe my thanks to Professor Barrie Jones, Professor David Evans, Dr. John Fothergill and Fernando Schlindwein from Leicester University for their encouragement, and Dr Anthony Brooms from Oxford University and Dr Mark Yoder from the Rose-Hulman Institute of Technology, USA, for reviewing the material.

My thanks to all of my colleagues at the Department of Engineering at Bristol University and to all of our students, in particular Khaled, Fernando, Mohamed, Samir, Chris, Shirley and Julian. Also I would like to thank Cornelius Kellerhoff, European DSP Business Development Consultant, Paul Coulton, Communications Research Centre, Lancaster University, and Mariusz Jankowski, University of Southern Maine, for their valuable technical reviews.

I thank my parents, family and friends for their support and encouragement.

Finally, many thanks to Karen Sutherland, Julie Knight and all of the Pearson Education and Prentice Hall team who were very kind, supportive and encouraging.

N. Dahnoun
Naim.Dahnoun@Bristol.ac.uk

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