Embedded Systems and Computer Architecture

Embedded Systems and Computer Architecture

by Graham R Wilson


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ISBN-13: 9780750650649
Publisher: Elsevier Science
Publication date: 01/08/2002
Edition description: BK&CD-ROM
Pages: 320
Product dimensions: 0.65(w) x 7.44(h) x 9.69(d)

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Embedded Systems and Computer Architecture

By G. R. Wilson

Elsevier Science

Copyright © 2002 G. R. Wilson
All rights reserved.
ISBN: 978-0-08-047755-8



Binary numbers

Our study of computing machines begins by looking at the basic components from which a machine might be constructed. We begin by asking how numbers may be represented in a machine.

1.1 Numbers within a computing machine

The simplest numbers that we want to represent in the machine are the unsigned integers. These are whole numbers without a sign, for example, 0, 1, 2, 3, ... The mechanical calculators of yesteryear and the car mileage meter of today both store unsigned integers on what are effectively cogs having ten numbered teeth. Thus a simple two-digit calculator capable of addition and subtraction will comprise two cogs, one indicating units, the other indicating tens, Figure 1.1.

A simple device moves the tens cog one position every time the units cog completes a rotation and passes from 9 back to 0. Thus, if the tens cog currently indicates 4 and the units cog indicates 9, when the units cog is moved forward one position, so adding 1, the cogs correctly display the result 50. The 'carry' from the units cog to the tens cog is thus automatic.

Decimal numbers are represented by using the ten digits 0, 1, 2, ... 9 in such a way that each digit is interpreted according to its position in the number. That is, a three-digit number represented on the cogs as <d2, d1, d0> is interpreted as

100.d2 + 10.d1 + 1.d0

or 102.d2 + 101.d1 + 100.d0

e.g. 406 is said to represent the number four hundreds, no tens, and six units.

The digits are weighted according to their position in the number; in general, digit dJ has a weight of 10J.

Now consider four imaginary cogs having just two teeth, labelled 0 and 1. Again, a simple device moves the cog to the left one position every time a cog completes a rotation and passes from 1 back to 0. When advanced one step at a time the cogs will display the sequence shown in Figure 1.2.

The cogs now have weights of 8, 4, 2 and 1 and when they indicate <b3, b2, b1, b0>, the value of the number, in decimal, is obtained from:

8.b3 + 4.b2 + 2.b1 + 1.b0

or 23.b3 + 22.b2 + 21.b1 + 20.b0

e.g. the number 1101 is interpreted as one 8, one 4, no 2s, and 1 unit or 1.8 + 1.4 + 0.2 + 1.1 = 13, in decimal notation.

This method of representing numbers is called pure binary notation. We use this notation to represent unsigned integers. The digits 0 and 1 are called binary digits, or bits. The four-cog mechanism represents numbers using 4 bits and so can represent only the 16 numbers, 0000 to 1111. If we use 5 bits to represent a number, the extra bit allows us to represent twice as many numbers, 0000 to 11111. In general, if we use N bits to represent a number, we have 2N different numbers. An N-bit number <bN-1 bN-2 ... b2b1b0> has the decimal value 2N-1.bN-1 + 2N-2.bN-2 ... + 22.b2 + 21.b1 + 20.b0.

1.2 Adding binary integers

The familiar rules for adding two decimal digits are shown, in part, in Figure 1.3(a). Note that the addition of two one-digit numbers results in a two-digit number; we call the right-most digit the sum digit and the left-most digit the carry digit. Decimal addition proceeds as shown in the example Figure 1.3(b). Starting with the right-most pair of digits, the sum digit is written down and the carry digit is carried into the column to the left. The sum of this column of digits therefore requires that we add three digits. Note that, if the number mechanism holds only two-digit numbers, the sum in this example has overflowed; that is, the sum is too big to be held in the mechanism.

The rules for the addition of two binary digits are much simpler, Figure 1.4.

1.3 Representing signed integers

Signed integers are numbers such as -3, -2, -1, 0, +1, +2. Let there be a number <0111>. Counting down gives the sequence shown in Figure 1.5. Note that when the bits reach <0000>, the next lower number is <1111>, which we regard as the number 'one less than zero', or -1. (Imagine a car mileage meter that is turned back from 00000 to 99999.) These numbers may be evaluated by giving the bits the weight -8, +4, +2, +1. This method of representing signed integers is called two's complement representation. In general, the left-most bit of a two's complement number has a negative weight. For example, the signed integer <p3p2p1p0> has the decimal value:

-8.p3 + 4.p2 + 2.p1 + 1.p0

or -23.p3 + 22.p2 + 21.p1 + 20.p0

e.g. 1101 represents -8.1 + 4.1 + 2.0 + 1.1 = (-3)

and 0010 represents -8.0 + 4.0 + 2.1 + 1.0 = (+2)

1.4 Addition and subtraction of signed integers

The two's complement representation of signed integers has the valuable property that two such numbers can be added using the same arithmetical rules as for unsigned integers. This has the great advantage that any mechanism we devise for the addition of unsigned integers will also work correctly for signed integers. Consider the following addition:


The fifth bit, at the extreme left, is called the carry-out. If this bit is ignored, what remains is the correct representation on the machine for the sum, 1. Similarly, the following addition gives a sum of <1111>, which is the correct representation for -1 on the machine.


The ability to add negative numbers implies that subtraction can be performed by the process 'change the sign and add' since:

(+A) - (+B) [equivalent to] (+A) + (-B)

and (+A) - (-B) [equivalent to] (+A) + (+B)

Thus, in order to perform subtraction on a machine that is capable of addition, the machine must also be capable of changing the sign of a number, that is, it must have the facility of multiplying the number by -1. This is quite simple when the numbers are represented in two's complement: we simply invert all the bits and add 1. For example:


1.5 Two's complement theory

The English language is not very good at making clear the distinction between numbers and arithmetical operations. Thus, English uses 'plus' and 'minus' to indicate both the sign of a number and the arithmetical operations 'add' and 'subtract'. These double meanings, or ambiguities, are also evident in the use of '+' and '-' to indicate the sign of a number as well as 'add' and 'subtract'. In everyday use, the meaning of an ambiguous term such as 'plus' is understood by the reader who makes use of the context, that is, the other words or symbols in the sentence. Since our purpose is to design a machine for processing numbers, we must be absolutely clear about what it is we want the machine to do. Where there is any ambiguity, we shall use '+' and '-' to indicate the sign of a number, and use 'add' and 'subtract' to indicate an arithmetical operation.

Let a number be represented in pure binary by N bits; there are 2N possible numbers in the range 0 to 2N - 1.

Let A and B be unsigned integers in the range 0 to 2N-1 - 1.

Represent (+A) by the pure binary number A, and represent (-A) by the pure binary number 2N - A. For example, for N = 8, (+3) is represented by 0000 0011 and (-3) is represented by 256 - 3 = 253 binary 1111 1101.

Consider the four possible additions of A and B.

(+A) add (+B) = A add B, which is the correct representation of the required result.

(+A) add (-B) = A add (2N subtract B) = 2N subtract (B subtract A), which is the correct representation of -(B subtract A) or +(A subtract B), the required result.

(-A) add (+B) = (2N subtract A) add B = 2N subtract (A subtract B), which is the correct representation of -(A subtract B) or +(B subtract A), the required result.

(-A) add (-B) = (2N subtract A) add (2N subtract B) = 2N add 2N subtract (A plus B). The first 2N causes a carry-out of the left-hand end of the number. Ignoring this carry leaves 2N subtract (A plus B), which is the correct representation of -(A add B), the required result.

Therefore, when signed integers are represented using two's complement, we apply the normal rules of binary addition and ignore any carry-out. This gives the correct result.

Earlier, we simply stated that to multiply a number by 1, we invert all the bits and add 1. To see why this works, consider an N-bit number, A. Invert all the bits to get the number B. Now A B 111..1 = 2N - 1 always, so that B = 2N - 1 - A. Adding 1 to this gives 2N - A, which is the required two's complement representation of -A.

1.6 Use of hexadecimal representation

While electronic computers represent both data and instructions as patterns of bits, it is inconvenient for humans to write down and read long patterns of 0s and 1s. Purely as a matter of convenience, the binary patterns are usually written in hexadecimal. This simply requires that the person reading the hexadecimal numbers remembers the first 16 pure binary numbers and their equivalent in hexadecimal, Figure 1.6.

Instead of writing 0011110010010101,
group the bits into fours 0011 1100 1001 0101,
and write the hexadecimal digit for each group:

This is much easier for a person to read once the above table has been memorized. This hexadecimal number is often written 0x3C95, 0X3C95, 3C95H, or 3C95h to distinguish it from a decimal number. Hexadecimal or 'hex' is widely used to represent patterns of 0s and 1s within computing machines; it is purely for human convenience – the computing machine, of course, works with 0s and 1s.

1.7 Problems

1 Write down the hexadecimal representation of the following bit patterns:

(i) 0001 1111 (ii) 1100 1101 (iii) 1001 0111 1111 1111.

2 Write down the bit patterns represented by the following hexadecimal numbers:

(i) 0x1F (ii) 0xCD (iii) 0x97FF.

3 An N-bit unsigned integer is written bN-1bN-2..b2b1b0. Write an expression for its decimal value.

4 Convert the following unsigned integers to decimal:

(i) 1011 (ii) 0010 (iii) 0000 1111 (iv) 1111 1111.

5 How would the following numbers, written in decimal notation, be represented in 8 bits as unsigned integers?

(i) 1 (ii) 2 (iii) 127 (iv) 128 (v) 254 (vi) 255.

6 Obtain the sums of the following unsigned integers:

(i) 1011 0010 (ii) 0000 1111 0000 0001 (iii) 1111 1111 0000 0001.

Check your answers by converting the numbers to decimal.

7 An N-bit signed integer, in two's complement representation, is written: bN-1bN-2..b2b1b0. Write an expression for its decimal value.

8 Convert the following signed integers, written using two's complement representation, to decimal:

(i) 1011 (ii) 0101 (iii) 0000 1111 (iv) 1111 1111.

9 How would the following numbers, written using decimal notation, be represented in 8 bits using two's-complement representation?

(i) +1 (ii) +127 (iii) -1 (iv) -128 (v) +2 (vi) -2.

10 A number is represented by 16 bits. Answer each of the following questions by writing the binary representation of the number and its decimal equivalent.

(i) What is the largest value of the number assuming the 16 bits represent an unsigned integer?

(ii) What is the smallest value of the number assuming the 16 bits represent an unsigned integer?

(iii) What is the largest value of the number assuming the 16 bits represent a two's complement number?

(iv) What is the smallest value of the number assuming the 16 bits represent a two's complement number?

Excerpted from Embedded Systems and Computer Architecture by G. R. Wilson. Copyright © 2002 by G. R. Wilson. Excerpted by permission of Elsevier Science.
All rights reserved. No part of this excerpt may be reproduced or reprinted without permission in writing from the publisher.
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Table of Contents

Part One: The Building Blocks - Binary numbers; Logic expressions; Electronic logic circuits; Computer arithmetic; Part Two: Computing Machines - Computer design; Instruction set and code assembly; Program structures; Simple computer circuits; Input and output ports; Input and output methods; More devices; Assembler and linker tools; The control unit; Part Three: Larger Computers - Larger computers; Cache memory; Memory management; Appendix A G80 instruction set; Appendix B ASCII character codes; Appendix C Specifications of the input and output devices; Appendix D The GDS assembler and linker; Index

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