ISBN-10:
013142291X
ISBN-13:
9780131422919
Pub. Date:
05/28/2004
Publisher:
Prentice Hall
Handbook of Digital Techniques for High-Speed Design: Design Examples, Signaling and Memory Technologies, Fiber Optics, Modeling, and Simulation to Ensure Signal Integrity / Edition 1

Handbook of Digital Techniques for High-Speed Design: Design Examples, Signaling and Memory Technologies, Fiber Optics, Modeling, and Simulation to Ensure Signal Integrity / Edition 1

by Tom Granberg

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Product Details

ISBN-13: 9780131422919
Publisher: Prentice Hall
Publication date: 05/28/2004
Series: Prentice Hall Signal Integrity Library Series
Edition description: New Edition
Pages: 976
Product dimensions: 7.25(w) x 9.50(h) x 1.92(d)

About the Author

TOM GRANBERG has earned several technical degrees-a B.S. in Physics from Washington State University and an M.S. and Ph.D. in Electrical Engineering from the University of Missouri-Columbia. He also holds an M.B.A. from the University of Colorado at Denver. Tom has worked for dominant networking companies Cisco Systems and SkyStream Networks and in ASIC design emulation at Quickturn Design Systems (a Cadence Company). He has also worked in digital signal processing, digital imaging systems, and flat panel sensors, and at companies including Condor Systems, Martin Marietta (now Lockheed Martin), Storage Technology, and Honeywell Test Instruments. He lives in Santa Clara, California-the heart of the Silicon Valley-and enjoys access to many of the world 's newest technologies.

Read an Excerpt

Handbook of Digital Techniques for High-Speed DesignPrefaceHow This Book Is Organized

This book was designed from the beginning to be used as both an engineering textbook in colleges and universities and as an in-depth reference for practicing engineers. Chapters in the book are grouped by topic or function. The chapters would likely be most enjoyable if they were not read in numerical sequence but according to the reader's interests and goals, or the goals of the classroom. Chapters 4 through 9 discuss high-speed signaling technologies in so much detail that reading them all sequentially would result in glazed eyes and cure the worst insomniac!

You can gain a good appreciation for the content by taking a few moments to scan the table of contents, which is titled simply "Contents." This will not only give you an understanding of the book's subject matter but also the wide range of topics related to high-speed digital design. For use as a reference, you can, of course, just flip to the topic of interest.

Most readers will find a quick reading of Chapters 1 through 3 worthwhile. These provide a quick introduction to trends in high-speed design, SerDes and bus technologies, and very basic background information on signal integrity. After reading the first three chapters, you can read chapters according to your interest or the goals of the university course.

Chapter 4 starts off the discussion of high-speed signaling technologies with GTL, GTLP, GTL+, and AGTL+. Chapter 5 introduces LVDS. Chapter 6 talks about the differences among BLVDS, LVDM, and M-LVDS. Chapter 7 details HSTL and SSTL. Chapter 8 categorizes and gives organization to the multitude of ECL devices out in the marketplace today. Chapter 9 discusses CML and explains how it differs from ECL.

Chapter 10 discusses high-speed features of today's Altera and Xilinx FPGAs such as 3.125 Gbps RocketIOs. It also discusses HardCopy devices, a shorter time-to-market and less expensive alternative to ASICs for some applications. Chapter 12 discusses high-speed interconnects and cabling. As we'll mention again below, Chapter 23 models and simulates 5-to-10 Gbps board-to-board interconnects.

Those interested in memory technologies should read Chapter 7 on HSTL and SSTL signaling technologies, which are used by memory devices, and then move on to Chapter 13, which provides an overview of memory technologies. After that, you can elect to read about the memory technologies that interest you the most in Chapters 14 through 18, which discuss the various memory technologies in detail.

Chapter 19 introduces the basic theory behind S-parameters and continues on into the more challenging realm of differential and mixed-mode S-parameters. N-port, mixed-mode S-parameters are discussed in the Appendix to Chapter 23. Given that all of today's high-speed serial links are differential in nature, differential and mixed-mode S-parameters have become very relevant topics and are frequently used today in the modeling of high-speed systems.

Chapter 20 discusses TDR and TDT, time-domain reflectometry and time-domain transmission. These techniques are also in frequent use today in both the simulation and testing of high-speed circuit boards.

Three-and-a-half chapters are dedicated to fiber optics due to its increasing importance in high-speed design. Chapter 11 is a broad introduction to fiber optics. Chapter 28 discusses electrical optical circuit boards and Chapter 24 discusses modeling and simulation of fiber-optic transceivers. The second half of Chapter 31 discusses the testing and measurement of optical systems in Section 31.6, which starts on page 880.

Two chapters introduce modeling and simulation and four other chapters provide major, detailed design examples. Chapter 21 introduces modeling with IBIS. Chapter 22 introduces tools from Mentor Graphics Corporation and talks about the flow of the design process. Chapter 23 discusses the advances in design, modeling, simulation, and validation of board-to-board 5-to-10 Gbps interconnects through an actual example. As mentioned before, Chapter 24 discusses modeling and simulation of fiber-optic transceivers, and Chapter 26 is an excellent design example which uses BLVDS SerDes devices. Chapter 27 is dedicated entirely to an example of designing 3.125 Gbaud high-speed serial links using Motorola's WarpLink serial devices. Chapter 25, while not presenting a detailed design example, does discuss every aspect of designing with LVDS.

Four chapters discuss LVDS and Bus LVDS. As stated before, Chapter 5 discusses the LVDS signaling standard and Chapter 6 discusses the BLVDS, LVDM, and M-LVDS signaling standards. Chapter 25 discusses how to design using LVDS and Chapter 26 is an excellent example of a detailed design using BLVDS SerDes devices.

Chapters 29 and 30 discuss the emerging protocols and technology behind RapidIO (Chapter 29) and PCI-Express (Chapter 30). These chapters provide an insight into what is being done to address the issues of faster and faster data rates in embedded systems, and ever-increasing bus speeds and system architecture complexity.

Finally, Chapter 31 is an informative discussion on the high-speed aspects of laboratory and test equipment, including such topics as equivalent-time oscilloscopes.

Throughout this textbook, there are numerous simulation examples and discussions of modeling. The reader is referred to the index for a detailed listing of "simulations" and "models."

This Textbook Was Written with Educational Institutions in Mind

This textbook was prepared from the beginning to be used not only by practicing engineers in the field working with high-speed digital electronics, but by instructors at universities and colleges who wish to teach high-speed digital design fundamentals to their students. High-speed digital design concepts and techniques can no longer be left for students to learn on the job after graduation. Today's clock rates in the hundreds of megahertz for typical applications and in the multigigahertz range for SerDes applications make this knowledge basic and fundamental to any electrical engineering degree.

Prior to this textbook, there has been no suitable textbook available from which to teach these required concepts. The handful of books written on this subject do not make good textbooks for a number of reasons. Two-thirds of these books have no exercises — no homework problems — and leave the extremely time-consuming task of developing these problems to the instructor who could better spend his or her time assisting students. Many of these books have no discussion of the various high-speed signaling technologies such as SSTL (Stub-Series-Terminated Logic), CML (Current-Mode Logic), or proprietary signaling technologies such as Motorola's controlled-impedance WarpLink technology. Today's CML is not a synonym for ECL as was the case two decades ago.

Many of these unsuitable-for-the-classroom books do not provide the basic background material on which high-speed design concepts are based. For example, many of them include no discussion of SerDes devices, double data rate (DDR) and quad data rate (QDR) devices, and no discussion of embedded clocks or echo clocks used by memory devices. They do not provide any discussion of the wide range of high-speed memory devices available today — SigmaRAM, Fast Cycle RAM, Network DRAM, Reduced Latency DRAM, Zero Bus Turnaround SRAM, and so on — at all. These books provide no background in TDR (time-domain reflectometry), which has changed considerably from years ago when it was used to find faults on power cables. The books that do mention it assume the reader is versatile in making TDR measurements. They provide no discussion of S-parameters, let alone the differential and mixed-mode S-parameters in use today, and leave it for the reader to hunt down microwave books or application notes for material on these subjects. Many books do not discuss how jitter is measured and how jitter masks are created and used.

Some of these books are too specialized and leave out the broad scope that this field invloves. Two signal integrity books I have seen are so mathematically rigorous that any course taught using them would be a math course and not an electrical engineering or design course. One is so mathematically rigorous that I believe it would intimidate the great majority of math professors as well, and is just not appropriate for an engineering or digital design course.

Of critical importance today are the EDA (Electronic Design Automation) tools that are used to generate high-speed digital designs. Most books make no mention of these, let alone discuss design constraints and how constraints are implemented and integrated into the design. Today, also, fiber optics is taking on increasing importance in high-speed designs and, as with the many other subjects mentioned above, most other high-speed design and signal integrity books do not touch on this subject.

Enough negativity — these other books do make excellent references for the practicing engineer and allow the reader to research the topics presented in great detail.

University Courses for Which This Book Is Suitable

This book is suitable for use in a one- or two-semester course in high-speed digital design or in a one-semester course in the use of high-speed memory devices. Six of the 31 chapters are dedicated to memory devices. The material could be taught as either a junior-level or senior-level undergraduate course in that there is a minimum of math throughout the book. The material could also be taught at a more accelerated pace at the graduate level.

Solutions Manual Is Available

A 160-page (approximately) solutions manual is available to instructors teaching courses based upon this textbook. The manual includes answers to every exercise listed in the textbook with the exercises listed in the order of the chapters. Each exercise is restated in the manual and the solution is provided immediately below the restated exercise. The solutions manual includes figures and is fully typeset. There is no handwritten material.

Cash for Identifying Textbook Errors

In writing this book, I have made every effort to be as accurate and diligent as possible. However, it seems like small typographical and other errors always creep into all books no matter how diligent the publisher and author have been. In an effort to make this book as error-free as possible, a $5 reward is offered for the identification of each error, no matter how small. To claim this reward, please provide the following:

  • Book edition
  • Section number where the error occurs
  • Section title
  • Page number
  • Description of the error
  • Correction to the error, if possible

Your name and postal mailing address (to send the check to) and send this information to ErrorsFor5@comcast.net. In return, I'll send you $5 per error for errors not previously identified.

A list of identified errors is listed at Web site http://www.high-speedsolutions.com. (Please note the dash in the URL.) Please allow several weeks for payment to be made. For practical reasons, I need to reserve the right to decide what constitutes an error and whether payment should be made, and to terminate this offer at any time. However, please be assured that I am very willing and happy to pay this reward in order to make this book as accurate and error-free as possible.

How This Book Was Prepared

This book was prepared on a Gateway 700SE, Pentium 4, 2 GHz PC with 1,024 MB of PC800 RDRAM and a 40 GB hard drive. Adobe FrameMaker 7.0 was used to edit the text and import the figures, and Adobe Illustrator 10.0 was used to create many of the figures. Adobe Photoshop was used later on by the publisher to adjust the contrast of the figures and to add text where appropriate.

Figure files were kept separate from the FrameMaker text file and most figures were imported by reference, rather than embedded in the document. The FrameMaker text file was 36 MB, and the separate figure files totalled 2,468 MB when submitted to the publisher. The text file included a few embedded figures which made it larger than if it were just pure text, and the figure file size total included both source files and the figure files exported from those source files to other formats. After editing at Prentice Hall, the text file was 250 KB (including embedded figures) and the figure files totalled 264 MB after compression and excluding the source files.

Prentice Hall prefers source files to be in EPS format, which are then exported into highresolution TIFF format for importing by reference into the FrameMaker document. Prentice Hall supplied electronic template files that allowed the book to be properly formatted for publication right from the beginning. I found Adobe Illustrator and FrameMaker to be excellent tools, and Adobe Technical Support was excellent, but necessary, due to the powerful capability and extreme complexity of these tools. I highly recommend these Adobe products, which is in agreement with Prentice Hall's recommendation to use them as well.

All documents and information that were reviewed for general knowledge or research, or for inclusion in the book, were downloaded from the Internet using Comcast's high-speed Internet service. Comcast proved to be 100 percent reliable and as fast as the Internet connections that I have had at any engineering company. While at the start of the book project, I intentionally took two days to identify and visit the best technical libraries in the area for access to material, I subsequently never set foot in them again. It took approximately 3,500 hours over 25 months to write this over 900-page book which is a testimony to the power of the Internet.

Personal Acknowledgments

In writing this book, there was overwhelming support from a multitude of friends. I would like to thank Lilly Santos for her constant encouragement and morale-boosting humor over the two years it took to write the book. Joelle Henningsen was always so positive and provided me with enlightenment and support during the tedious preparation of numerous drafts. Her daily phone calls kept the walls of the cabin from closing in too tightly. Ursula Walker always made life easier with her warmth and understanding of my commitment to the book, which frequently left little time for social activities. Beverly Petersen was encouraging and supportive and special thanks go to her as well. Nancy Lee was always cheerful and supportive.

Patty Koledo's enthusiasm was genuine and almost overwhelming, a real boost on those sometimes unproductive days. Stephanie Nguyen helped on several occasions by dragging me off to a restaurant and providing a well-needed break. Heidi Hausauer was supportive and encouraging, although her numerous vacations did seem to contrast at times with the austere lifestyle of an author. Heidi Foster needs to be thanked for her constant reminders for me to type the words, "The End" — which, by the way, never made it into the book. I guess they're only put in movie scripts!

I also need to thank Lindsay Van Sant for being so positive and encouraging, and for supplying levity which helped to foster a creative and productive environment. Lindsay is a teacher, and her genuine interest in my success was evidence as to why she is such a good teacher.

Special thanks need to go to Blanca Domingo-Yenes for her great positive attitude and her encouragement and excitement about the book over the many months it took to write it.

I need to thank Barbara Zingalis for influencing me to get a new computer, which made a huge improvement in the book effort. The higher speed of the newer machine and the much larger hard disk drive were of great help when it came to working with large figure files and updating the FrameMaker book file.

Rosemary Steiner, a family friend, was delighted to hear of the book project, and Shirley Glass, and Phyllis and Bill Allen were very supportive through their spontaneous belief in the success of the book.

Steve Florek helped tremendously by reviewing ideas for book content and in gathering a large volume of information on TDR, and in acting as a sounding board for ideas over several lunches and telephone conversations.

Michelle and Ricardo Castro were always so uplifting to be around, while Lesley McIntosh continually created a positive environment by her wonderful good nature and patient ways. David Weise and Valentina Kostenko were continually motivating to be around due to their happy nature and enthusiasm for just about everything.

Denise Jordaine must be highly intuitive as she told me that she thought I was an author upon meeting me for the first time, not knowing what I did for a living. This was before I had even thought about working on the book . . . a little spooky!

Dianne Pittman needs to be acknowledged for her large amounts of encouragement and a very helpful, great positive attitude. Mary Cheryl Walker must also be acknowledged for her astute perceptions, high intellect, and uplifting spirit.

Iris Renner, my Swiss connection, always provided encouragement, although from nine time zones over.

Special thanks to Mike Michaelian, a friend and good family man, who was never reluctant to take on a challenge.

I would also like to congratulate Tom Kung, a fellow engineer, on his recent marriage.

Special thanks go to a squirrel, name unknown, who, on frequent occasions, would jump from redwood tree to redwood tree at 50 feet off the ground, providing pleasant entertainment breaks from the discipline of writing this book. I'd just barely look up and all of a sudden this squirrel would go flying off of one tree and barely land on the other by grabbing the bare tips of a branch and spring back and forth dangling at the end of the branch — a high-wire act that would draw good crowds at Wringling Brothers and Barnum and Baily's Circus.

Molly, Kate, Stan, Sara, and Brighten deserve special mention and hopefully will take no offense to being listed after the squirrel, as none was meant.

And lastly, and most importantly, I need to say thank you to my parents, Jane and Bertil, for teaching me to value education.

Technical Acknowledgments

First and foremost, I would like to thank John Congistre, one of the most talented engineers whom I have come to know in my career, for his numerous rescues and bailouts resolving design problems which otherwise might have impacted project schedules and my career!

Bill Slattery is to be thanked for his patience and good people skills during FPGA and PCB designs and I wish him all the best as a co-founder of Skystream Networks in Sunnyvale, California.

Special thanks go out to all the people at Prentice Hall and their contractors who made the publication of this book possible. I am most grateful to Bernard Goodwin, my acquisition editor, or agreeing to publish the book. Thanks also go to Nick Radhuber for reviewing electronic files and answering technical questions on FrameMaker. Vanessa Moore performed the major editing of figures and text, as well as checked permission approvals throughout the entire text for quoted material and reprinted figures, a very big job! Anne Garcia served as the overall production manager for the publication of the book. Jennifer Bergamini was the talented artist who developed the book cover. Michelle Vincenti helped out tremendously with reviewer comments. Lawrence Hargett performed the copy editing for the book and also prepared the back cover copy.

Several people were engaged by Prentice Hall to review chapters of the book as the chapters were written. Jay Michlin was the major reviewer and proofread the entire text from beginning to end. Thank you, Jay, as that took special commitment and is fully appreciated. Much appreciation also goes out to the other reviewers as well — David Cruzado, Jim Peterson, Sam Shaw, and others. A lot of what went into making this book easier to read and better organized is due to their efforts. Not all of their recommendations were able to be implemented due to time constraints and page limitations, but these recommendations were nonetheless appreciated just as fully.

I need to thank the engineering staff at Mentor Graphics Corporation who enthusiastically supported the development of Chapter 22 on Mentor Graphics' software EDA tools. A tremendous amount of appreciation and praise goes to Matthew Hogan who was able to assist me in writing and pulling together the entire chapter. Matt was fun to work with and is a very smart fellow with a very bright future. Dave Kohlmeier and Joe Curcurio also supported this effort and need to be thanked as well.

John Goldie of National Semiconductor Corporation authored several of the application notes from which material was drawn for inclusion in this handbook. He is also to be thanked for providing the answers to several technical questions which were included in the content of this book as well.

Special thanks to Greg Peters at Agilent Technologies for his success in acquiring the necessary resources to provide information on test equipment, and to Greg Le Cheminant, also at Agilent Technologies, for his authoring of Chapter 31 on test equipment. Two other Agilent professionals, Rich Mills and Lou Eckert, were very helpful in providing information. Lou answered several difficult technical questions on vector network analyzers, which were included in the book to the reader's benefit. In a business environment where some reprint permission approvals took many months, I found Agilent Technologies to be extremely professional and expedient in granting approval, thanks to Danielle Flint. These folks were just a pleasure to work with.

I also need to thank Diane Trevino at National Semiconductor Corporation for assisting me in obtaining copyright permissions on several occasions, and Lucinda Mattera, Associate Chief Editor at Penton Media, Inc., for assisting me in getting reprint permissions for articles in Electronic Design magazine. Special thanks go to Yuzo Ishii at NTT Corporation for a very quick response to my permission request from halfway around the world, and to Juergen Schrage at C-LAB for help in obtaining permission approvals.

I would also like to thank several additional people, Charlie Leber for being an all-around great guy to work with, Itsu Wang for helping me review material on Atmel devices, and Actel's Bill Bailey for suggesting that I include information on memory devices. As a result, six chapters on memory devices were included in the book, quite an impact for a single suggestion!

The professionals at Xilinx were extremely helpful — Jeff Weintraub for coordinating everything, Trisa Fleckenstein for legal permissions, Anna Acevedo, a manager for communicating status, and Austin Lesea and Mark Alexander for reviewing material.

Special thanks to Brad Cole of Ansoft Corporation for taking the time to explain Ansoft products and EDA tools. While I was unable to describe Ansoft products in as much detail as I had originally planned due to time and page-count limitations, I was impressed with what I learned about these valuable tools. I will be highly recommending them to engineers I come in contact with in the future for suitable applications.

Two others played critical parts in the development of the book: Garth Sundberg at Maxim Integrated Products who provided detailed technical answers to questions about signaling devices and S-parameters, and Steven Woo at Rambus who supplied needed technical material about RDRAM and XDR DRAM technologies.

Finally, special thanks go out to a multitude of professionals, too numerous to mention, who assisted me in obtaining reprint permissions from over 60 different companies. The information they granted permission to use has resulted in a book which, I hope, the reader will find very factual, hands-on, and more exciting to read.

© Copyright Pearson Education. All rights reserved.

Table of Contents

Preface.

I. INTRODUCTION.

1. Trends in High-Speed Design.

2. ASICs, Backplane Configurations, and SerDes Technology.

3. A Few Basics on Signal Integrity.

II. SIGNALING TECHNOLOGIES AND DEVICES.

4. Gunning Transceiver Logic (GTL, GTLP, GTL+, AGTL+).

5. Low Voltage Differential Signaling (LVDS).

6. Bus LVDS (BLVDS), LVDS Multipoint (LVDM), and Multipoint LVDS (M-LVDS).

7. High-Speed Transceiver Logic (HSTL) and Stub-Series Terminated Logic (SSTL).

8. Emitter Coupled Logic (ECL, PECL, LVPECL, ECLinPS Lite and Plus, SiGe, ECL Pro, GigaPro and GigaComm).

9. Current-Mode Logic (CML).

10. FPGAs - 3.125 Gbps RocketIOs and HardCopy Devices.

11. Fiber-Optic Components.

12. High-Speed Interconnects and Cabling.

III. HIGH-SPEED MEMORY AND MEMORY INTERFACES.

13. Memory Device Overview and Memory Signaling Technologies.

14. Double Data Rate SDRAM (DDR, DDR2) and SPICE Simulation.

15. GDDR3, ZBT, FCRAM, SigmaRAM, RLDRAM, DDR SRAM, Flash, FeRAM, and MRAM.

16. Quad Data Rate (QDR, QDRII) SRAM.

17. Direct Rambus DRAM (DRDRAM).

18. Xtreme Data Rate (XDR) DRAM, FlexPhase and ODR.

IV. MODELING, SIMULATION, AND EDA TOOLS.

19. Differential and Mixed-Mode S Parameters.

20. Time Domain Reflectometry (TDR), Time Domain Transmission (TDT), and VNAs.

21. Modeling with IBIS.

22. Mentor Graphics - EDA Tools for High-Speed Design, Simulation, Verification, and Layout.

V. DESIGN CONCEPTS AND EXAMPLES.

23. Advances in Design, Modeling, Simulation, and Measurement Validation of High-Performance Board-to-Board 5-to-10 Gbps Interconnects.

Appendix 23A. Generalized N-Port, Mixed-Mode S-Parameters.

24. IBIS Modeling and Simulation of High-Speed Fiber-Optic Transceivers.

25. Designing with LVDS.

26. Designing to 10 Gbps Using SerDes Transceivers, Serializers, and Deserializers.

27. WarpLink SerDes System Design Example.

VI. EMERGING PROTOCOLS AND TECHNOLOGIES.

28. Electrical Optical Circuit Board (EOCB).

29. RapidIO.

30. PCI Express and ExpressCard.

VII. LAB AND TEST INSTRUMENTATION.

31. Electrical and Optical Test Equipment.

Acronyms.

References.

About the Author.

Preface

Handbook of Digital Techniques for High-Speed Design

Preface

How This Book Is Organized

This book was designed from the beginning to be used as both an engineering textbook in colleges and universities and as an in-depth reference for practicing engineers. Chapters in the book are grouped by topic or function. The chapters would likely be most enjoyable if they were not read in numerical sequence but according to the reader's interests and goals, or the goals of the classroom. Chapters 4 through 9 discuss high-speed signaling technologies in so much detail that reading them all sequentially would result in glazed eyes and cure the worst insomniac!

You can gain a good appreciation for the content by taking a few moments to scan the table of contents, which is titled simply "Contents." This will not only give you an understanding of the book's subject matter but also the wide range of topics related to high-speed digital design. For use as a reference, you can, of course, just flip to the topic of interest.

Most readers will find a quick reading of Chapters 1 through 3 worthwhile. These provide a quick introduction to trends in high-speed design, SerDes and bus technologies, and very basic background information on signal integrity. After reading the first three chapters, you can read chapters according to your interest or the goals of the university course.

Chapter 4 starts off the discussion of high-speed signaling technologies with GTL, GTLP, GTL+, and AGTL+. Chapter 5 introduces LVDS. Chapter 6 talks about the differences among BLVDS, LVDM, and M-LVDS. Chapter 7 details HSTL and SSTL. Chapter 8 categorizes and gives organization to the multitude of ECL devices out in the marketplace today. Chapter 9 discusses CML and explains how it differs from ECL.

Chapter 10 discusses high-speed features of today's Altera and Xilinx FPGAs such as 3.125 Gbps RocketIOs. It also discusses HardCopy devices, a shorter time-to-market and less expensive alternative to ASICs for some applications. Chapter 12 discusses high-speed interconnects and cabling. As we'll mention again below, Chapter 23 models and simulates 5-to-10 Gbps board-to-board interconnects.

Those interested in memory technologies should read Chapter 7 on HSTL and SSTL signaling technologies, which are used by memory devices, and then move on to Chapter 13, which provides an overview of memory technologies. After that, you can elect to read about the memory technologies that interest you the most in Chapters 14 through 18, which discuss the various memory technologies in detail.

Chapter 19 introduces the basic theory behind S-parameters and continues on into the more challenging realm of differential and mixed-mode S-parameters. N-port, mixed-mode S-parameters are discussed in the Appendix to Chapter 23. Given that all of today's high-speed serial links are differential in nature, differential and mixed-mode S-parameters have become very relevant topics and are frequently used today in the modeling of high-speed systems.

Chapter 20 discusses TDR and TDT, time-domain reflectometry and time-domain transmission. These techniques are also in frequent use today in both the simulation and testing of high-speed circuit boards.

Three-and-a-half chapters are dedicated to fiber optics due to its increasing importance in high-speed design. Chapter 11 is a broad introduction to fiber optics. Chapter 28 discusses electrical optical circuit boards and Chapter 24 discusses modeling and simulation of fiber-optic transceivers. The second half of Chapter 31 discusses the testing and measurement of optical systems in Section 31.6, which starts on page 880.

Two chapters introduce modeling and simulation and four other chapters provide major, detailed design examples. Chapter 21 introduces modeling with IBIS. Chapter 22 introduces tools from Mentor Graphics Corporation and talks about the flow of the design process. Chapter 23 discusses the advances in design, modeling, simulation, and validation of board-to-board 5-to-10 Gbps interconnects through an actual example. As mentioned before, Chapter 24 discusses modeling and simulation of fiber-optic transceivers, and Chapter 26 is an excellent design example which uses BLVDS SerDes devices. Chapter 27 is dedicated entirely to an example of designing 3.125 Gbaud high-speed serial links using Motorola's WarpLink serial devices. Chapter 25, while not presenting a detailed design example, does discuss every aspect of designing with LVDS.

Four chapters discuss LVDS and Bus LVDS. As stated before, Chapter 5 discusses the LVDS signaling standard and Chapter 6 discusses the BLVDS, LVDM, and M-LVDS signaling standards. Chapter 25 discusses how to design using LVDS and Chapter 26 is an excellent example of a detailed design using BLVDS SerDes devices.

Chapters 29 and 30 discuss the emerging protocols and technology behind RapidIO (Chapter 29) and PCI-Express (Chapter 30). These chapters provide an insight into what is being done to address the issues of faster and faster data rates in embedded systems, and ever-increasing bus speeds and system architecture complexity.

Finally, Chapter 31 is an informative discussion on the high-speed aspects of laboratory and test equipment, including such topics as equivalent-time oscilloscopes.

Throughout this textbook, there are numerous simulation examples and discussions of modeling. The reader is referred to the index for a detailed listing of "simulations" and "models."

This Textbook Was Written with Educational Institutions in Mind

This textbook was prepared from the beginning to be used not only by practicing engineers in the field working with high-speed digital electronics, but by instructors at universities and colleges who wish to teach high-speed digital design fundamentals to their students. High-speed digital design concepts and techniques can no longer be left for students to learn on the job after graduation. Today's clock rates in the hundreds of megahertz for typical applications and in the multigigahertz range for SerDes applications make this knowledge basic and fundamental to any electrical engineering degree.

Prior to this textbook, there has been no suitable textbook available from which to teach these required concepts. The handful of books written on this subject do not make good textbooks for a number of reasons. Two-thirds of these books have no exercises — no homework problems — and leave the extremely time-consuming task of developing these problems to the instructor who could better spend his or her time assisting students. Many of these books have no discussion of the various high-speed signaling technologies such as SSTL (Stub-Series-Terminated Logic), CML (Current-Mode Logic), or proprietary signaling technologies such as Motorola's controlled-impedance WarpLink technology. Today's CML is not a synonym for ECL as was the case two decades ago.

Many of these unsuitable-for-the-classroom books do not provide the basic background material on which high-speed design concepts are based. For example, many of them include no discussion of SerDes devices, double data rate (DDR) and quad data rate (QDR) devices, and no discussion of embedded clocks or echo clocks used by memory devices. They do not provide any discussion of the wide range of high-speed memory devices available today — SigmaRAM, Fast Cycle RAM, Network DRAM, Reduced Latency DRAM, Zero Bus Turnaround SRAM, and so on — at all. These books provide no background in TDR (time-domain reflectometry), which has changed considerably from years ago when it was used to find faults on power cables. The books that do mention it assume the reader is versatile in making TDR measurements. They provide no discussion of S-parameters, let alone the differential and mixed-mode S-parameters in use today, and leave it for the reader to hunt down microwave books or application notes for material on these subjects. Many books do not discuss how jitter is measured and how jitter masks are created and used.

Some of these books are too specialized and leave out the broad scope that this field invloves. Two signal integrity books I have seen are so mathematically rigorous that any course taught using them would be a math course and not an electrical engineering or design course. One is so mathematically rigorous that I believe it would intimidate the great majority of math professors as well, and is just not appropriate for an engineering or digital design course.

Of critical importance today are the EDA (Electronic Design Automation) tools that are used to generate high-speed digital designs. Most books make no mention of these, let alone discuss design constraints and how constraints are implemented and integrated into the design. Today, also, fiber optics is taking on increasing importance in high-speed designs and, as with the many other subjects mentioned above, most other high-speed design and signal integrity books do not touch on this subject.

Enough negativity — these other books do make excellent references for the practicing engineer and allow the reader to research the topics presented in great detail.

University Courses for Which This Book Is Suitable

This book is suitable for use in a one- or two-semester course in high-speed digital design or in a one-semester course in the use of high-speed memory devices. Six of the 31 chapters are dedicated to memory devices. The material could be taught as either a junior-level or senior-level undergraduate course in that there is a minimum of math throughout the book. The material could also be taught at a more accelerated pace at the graduate level.

Solutions Manual Is Available

A 160-page (approximately) solutions manual is available to instructors teaching courses based upon this textbook. The manual includes answers to every exercise listed in the textbook with the exercises listed in the order of the chapters. Each exercise is restated in the manual and the solution is provided immediately below the restated exercise. The solutions manual includes figures and is fully typeset. There is no handwritten material.

Cash for Identifying Textbook Errors

In writing this book, I have made every effort to be as accurate and diligent as possible. However, it seems like small typographical and other errors always creep into all books no matter how diligent the publisher and author have been. In an effort to make this book as error-free as possible, a $5 reward is offered for the identification of each error, no matter how small. To claim this reward, please provide the following:

  • Book edition
  • Section number where the error occurs
  • Section title
  • Page number
  • Description of the error
  • Correction to the error, if possible

Your name and postal mailing address (to send the check to) and send this information to ErrorsFor5@comcast.net. In return, I'll send you $5 per error for errors not previously identified.

A list of identified errors is listed at Web site http://www.high-speedsolutions.com. (Please note the dash in the URL.) Please allow several weeks for payment to be made. For practical reasons, I need to reserve the right to decide what constitutes an error and whether payment should be made, and to terminate this offer at any time. However, please be assured that I am very willing and happy to pay this reward in order to make this book as accurate and error-free as possible.

How This Book Was Prepared

This book was prepared on a Gateway 700SE, Pentium 4, 2 GHz PC with 1,024 MB of PC800 RDRAM and a 40 GB hard drive. Adobe FrameMaker 7.0 was used to edit the text and import the figures, and Adobe Illustrator 10.0 was used to create many of the figures. Adobe Photoshop was used later on by the publisher to adjust the contrast of the figures and to add text where appropriate.

Figure files were kept separate from the FrameMaker text file and most figures were imported by reference, rather than embedded in the document. The FrameMaker text file was 36 MB, and the separate figure files totalled 2,468 MB when submitted to the publisher. The text file included a few embedded figures which made it larger than if it were just pure text, and the figure file size total included both source files and the figure files exported from those source files to other formats. After editing at Prentice Hall, the text file was 250 KB (including embedded figures) and the figure files totalled 264 MB after compression and excluding the source files.

Prentice Hall prefers source files to be in EPS format, which are then exported into highresolution TIFF format for importing by reference into the FrameMaker document. Prentice Hall supplied electronic template files that allowed the book to be properly formatted for publication right from the beginning. I found Adobe Illustrator and FrameMaker to be excellent tools, and Adobe Technical Support was excellent, but necessary, due to the powerful capability and extreme complexity of these tools. I highly recommend these Adobe products, which is in agreement with Prentice Hall's recommendation to use them as well.

All documents and information that were reviewed for general knowledge or research, or for inclusion in the book, were downloaded from the Internet using Comcast's high-speed Internet service. Comcast proved to be 100 percent reliable and as fast as the Internet connections that I have had at any engineering company. While at the start of the book project, I intentionally took two days to identify and visit the best technical libraries in the area for access to material, I subsequently never set foot in them again. It took approximately 3,500 hours over 25 months to write this over 900-page book which is a testimony to the power of the Internet.

Personal Acknowledgments

In writing this book, there was overwhelming support from a multitude of friends. I would like to thank Lilly Santos for her constant encouragement and morale-boosting humor over the two years it took to write the book. Joelle Henningsen was always so positive and provided me with enlightenment and support during the tedious preparation of numerous drafts. Her daily phone calls kept the walls of the cabin from closing in too tightly. Ursula Walker always made life easier with her warmth and understanding of my commitment to the book, which frequently left little time for social activities. Beverly Petersen was encouraging and supportive and special thanks go to her as well. Nancy Lee was always cheerful and supportive.

Patty Koledo's enthusiasm was genuine and almost overwhelming, a real boost on those sometimes unproductive days. Stephanie Nguyen helped on several occasions by dragging me off to a restaurant and providing a well-needed break. Heidi Hausauer was supportive and encouraging, although her numerous vacations did seem to contrast at times with the austere lifestyle of an author. Heidi Foster needs to be thanked for her constant reminders for me to type the words, "The End" — which, by the way, never made it into the book. I guess they're only put in movie scripts!

I also need to thank Lindsay Van Sant for being so positive and encouraging, and for supplying levity which helped to foster a creative and productive environment. Lindsay is a teacher, and her genuine interest in my success was evidence as to why she is such a good teacher.

Special thanks need to go to Blanca Domingo-Yenes for her great positive attitude and her encouragement and excitement about the book over the many months it took to write it.

I need to thank Barbara Zingalis for influencing me to get a new computer, which made a huge improvement in the book effort. The higher speed of the newer machine and the much larger hard disk drive were of great help when it came to working with large figure files and updating the FrameMaker book file.

Rosemary Steiner, a family friend, was delighted to hear of the book project, and Shirley Glass, and Phyllis and Bill Allen were very supportive through their spontaneous belief in the success of the book.

Steve Florek helped tremendously by reviewing ideas for book content and in gathering a large volume of information on TDR, and in acting as a sounding board for ideas over several lunches and telephone conversations.

Michelle and Ricardo Castro were always so uplifting to be around, while Lesley McIntosh continually created a positive environment by her wonderful good nature and patient ways. David Weise and Valentina Kostenko were continually motivating to be around due to their happy nature and enthusiasm for just about everything.

Denise Jordaine must be highly intuitive as she told me that she thought I was an author upon meeting me for the first time, not knowing what I did for a living. This was before I had even thought about working on the book . . . a little spooky!

Dianne Pittman needs to be acknowledged for her large amounts of encouragement and a very helpful, great positive attitude. Mary Cheryl Walker must also be acknowledged for her astute perceptions, high intellect, and uplifting spirit.

Iris Renner, my Swiss connection, always provided encouragement, although from nine time zones over.

Special thanks to Mike Michaelian, a friend and good family man, who was never reluctant to take on a challenge.

I would also like to congratulate Tom Kung, a fellow engineer, on his recent marriage.

Special thanks go to a squirrel, name unknown, who, on frequent occasions, would jump from redwood tree to redwood tree at 50 feet off the ground, providing pleasant entertainment breaks from the discipline of writing this book. I'd just barely look up and all of a sudden this squirrel would go flying off of one tree and barely land on the other by grabbing the bare tips of a branch and spring back and forth dangling at the end of the branch — a high-wire act that would draw good crowds at Wringling Brothers and Barnum and Baily's Circus.

Molly, Kate, Stan, Sara, and Brighten deserve special mention and hopefully will take no offense to being listed after the squirrel, as none was meant.

And lastly, and most importantly, I need to say thank you to my parents, Jane and Bertil, for teaching me to value education.

Technical Acknowledgments

First and foremost, I would like to thank John Congistre, one of the most talented engineers whom I have come to know in my career, for his numerous rescues and bailouts resolving design problems which otherwise might have impacted project schedules and my career!

Bill Slattery is to be thanked for his patience and good people skills during FPGA and PCB designs and I wish him all the best as a co-founder of Skystream Networks in Sunnyvale, California.

Special thanks go out to all the people at Prentice Hall and their contractors who made the publication of this book possible. I am most grateful to Bernard Goodwin, my acquisition editor, or agreeing to publish the book. Thanks also go to Nick Radhuber for reviewing electronic files and answering technical questions on FrameMaker. Vanessa Moore performed the major editing of figures and text, as well as checked permission approvals throughout the entire text for quoted material and reprinted figures, a very big job! Anne Garcia served as the overall production manager for the publication of the book. Jennifer Bergamini was the talented artist who developed the book cover. Michelle Vincenti helped out tremendously with reviewer comments. Lawrence Hargett performed the copy editing for the book and also prepared the back cover copy.

Several people were engaged by Prentice Hall to review chapters of the book as the chapters were written. Jay Michlin was the major reviewer and proofread the entire text from beginning to end. Thank you, Jay, as that took special commitment and is fully appreciated. Much appreciation also goes out to the other reviewers as well — David Cruzado, Jim Peterson, Sam Shaw, and others. A lot of what went into making this book easier to read and better organized is due to their efforts. Not all of their recommendations were able to be implemented due to time constraints and page limitations, but these recommendations were nonetheless appreciated just as fully.

I need to thank the engineering staff at Mentor Graphics Corporation who enthusiastically supported the development of Chapter 22 on Mentor Graphics' software EDA tools. A tremendous amount of appreciation and praise goes to Matthew Hogan who was able to assist me in writing and pulling together the entire chapter. Matt was fun to work with and is a very smart fellow with a very bright future. Dave Kohlmeier and Joe Curcurio also supported this effort and need to be thanked as well.

John Goldie of National Semiconductor Corporation authored several of the application notes from which material was drawn for inclusion in this handbook. He is also to be thanked for providing the answers to several technical questions which were included in the content of this book as well.

Special thanks to Greg Peters at Agilent Technologies for his success in acquiring the necessary resources to provide information on test equipment, and to Greg Le Cheminant, also at Agilent Technologies, for his authoring of Chapter 31 on test equipment. Two other Agilent professionals, Rich Mills and Lou Eckert, were very helpful in providing information. Lou answered several difficult technical questions on vector network analyzers, which were included in the book to the reader's benefit. In a business environment where some reprint permission approvals took many months, I found Agilent Technologies to be extremely professional and expedient in granting approval, thanks to Danielle Flint. These folks were just a pleasure to work with.

I also need to thank Diane Trevino at National Semiconductor Corporation for assisting me in obtaining copyright permissions on several occasions, and Lucinda Mattera, Associate Chief Editor at Penton Media, Inc., for assisting me in getting reprint permissions for articles in Electronic Design magazine. Special thanks go to Yuzo Ishii at NTT Corporation for a very quick response to my permission request from halfway around the world, and to Juergen Schrage at C-LAB for help in obtaining permission approvals.

I would also like to thank several additional people, Charlie Leber for being an all-around great guy to work with, Itsu Wang for helping me review material on Atmel devices, and Actel's Bill Bailey for suggesting that I include information on memory devices. As a result, six chapters on memory devices were included in the book, quite an impact for a single suggestion!

The professionals at Xilinx were extremely helpful — Jeff Weintraub for coordinating everything, Trisa Fleckenstein for legal permissions, Anna Acevedo, a manager for communicating status, and Austin Lesea and Mark Alexander for reviewing material.

Special thanks to Brad Cole of Ansoft Corporation for taking the time to explain Ansoft products and EDA tools. While I was unable to describe Ansoft products in as much detail as I had originally planned due to time and page-count limitations, I was impressed with what I learned about these valuable tools. I will be highly recommending them to engineers I come in contact with in the future for suitable applications.

Two others played critical parts in the development of the book: Garth Sundberg at Maxim Integrated Products who provided detailed technical answers to questions about signaling devices and S-parameters, and Steven Woo at Rambus who supplied needed technical material about RDRAM and XDR DRAM technologies.

Finally, special thanks go out to a multitude of professionals, too numerous to mention, who assisted me in obtaining reprint permissions from over 60 different companies. The information they granted permission to use has resulted in a book which, I hope, the reader will find very factual, hands-on, and more exciting to read.

© Copyright Pearson Education. All rights reserved.

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