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Real Chip Design and Verification Using VERILOG and VHDL
     

Real Chip Design and Verification Using VERILOG and VHDL

by Ben Cohen
 

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This book concentrates on common classes of hardware architectures and design problems,
and focuses on the process of transitioning design requirements into synthesizable HDL code.
Using his extensive, wide-ranging experience in computer architecture and hardware design,
as well as in his training and consulting work, Ben provides numerous examples of

Overview

This book concentrates on common classes of hardware architectures and design problems,
and focuses on the process of transitioning design requirements into synthesizable HDL code.
Using his extensive, wide-ranging experience in computer architecture and hardware design,
as well as in his training and consulting work, Ben provides numerous examples of real-life designs illustrated with VHDL and Verilog code. This code is shown in a way that makes it easy for the reader to gain a greater understanding of the languages and how they compare.
All code presented in the book is included on the companion CD, along with other information, such as application notes.

Product Details

ISBN-13:
9780970539427
Publisher:
VhdlCohen Publishing
Publication date:
01/28/2002
Pages:
424
Product dimensions:
8.25(w) x 10.00(h) x (d)

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