This book covers layout design and layout migration methodologies for optimizing multi-net wire structures in advanced VLSI interconnects. Scaling-dependent models for interconnect power, interconnect delay and crosstalk noise are covered in depth, and several design optimization problems are addressed, such as minimization of interconnect power under delay constraints, or design for minimal delay in wire bundles within a given routing area. A handy reference or a guide for design methodologies and layout automation techniques, this book provides a foundation for physical design challenges of interconnect in advanced integrated circuits.
1136502941
Multi-Net Optimization of VLSI Interconnect
This book covers layout design and layout migration methodologies for optimizing multi-net wire structures in advanced VLSI interconnects. Scaling-dependent models for interconnect power, interconnect delay and crosstalk noise are covered in depth, and several design optimization problems are addressed, such as minimization of interconnect power under delay constraints, or design for minimal delay in wire bundles within a given routing area. A handy reference or a guide for design methodologies and layout automation techniques, this book provides a foundation for physical design challenges of interconnect in advanced integrated circuits.
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Multi-Net Optimization of VLSI Interconnect
233
Multi-Net Optimization of VLSI Interconnect
233Paperback(Softcover reprint of the original 1st ed. 2015)
$99.99
99.99
In Stock
Product Details
ISBN-13: | 9781493942626 |
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Publisher: | Springer New York |
Publication date: | 08/23/2016 |
Edition description: | Softcover reprint of the original 1st ed. 2015 |
Pages: | 233 |
Product dimensions: | 6.10(w) x 9.25(h) x 0.02(d) |
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