Title: System on Chip Design Languages: Extended papers: best of FDL'01 and HDLCon'01, Author: Anne Mignotte
Title: Writing Testbenches using SystemVerilog, Author: Janick Bergeron
Title: Hardware Description Languages and their Applications: Specification, modelling, verification and synthesis of microelectronic systems, Author: Carlos Delgado Kloos
Title: Optimized ASIP Synthesis from Architecture Description Language Models, Author: Oliver Schliebusch
Title: The e Hardware Verification Language, Author: Sasan Iman
Title: Practical Formal Methods for Hardware Design, Author: Carlos Delgado Kloos
Title: Writing Testbenches: Functional Verification of HDL Models, Author: Janick Bergeron
Title: CTL for Test Information of Digital ICs, Author: Rohit Kapur
Title: Analog and Mixed-Signal Hardware Description Language, Author: A. Vachoux

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