Design for Manufacturability and Yield for Nano-Scale CMOS / Edition 1

by Charles Chiang, Jamil Kawa

Overview

Design for Manufacturability and Yield for Nano-Scale CMOS walks the reader through all the aspects of manufacturability and yield in a nano-CMOS process and how to address each aspect at the proper design step starting with the design and layout of standard cells and how to yield-grade libraries for critical area and lithography artifacts through place and route, CMP model based simulation and dummy-fill insertion, mask planning, simulation and manufacturing, and through statistical design and statistical timing closure of the design. It alerts the designer to the pitfalls to watch for and to the good practices that can enhance a design’s manufacturability and yield. This book is a must read book the serious practicing IC designer and an excellent primer for any graduate student intent on having a career in IC design or in EDA tool development.

Product Details

ISBN-13:	9789048173037
Publisher:	Springer Netherlands
Publication date:	11/23/2010
Series:	Integrated Circuits and Systems
Edition description:	Softcover reprint of hardcover 1st ed. 2007
Pages:	255
Product dimensions:	6.10(w) x 9.25(h) x 0.36(d)

About the Author

Dr. Charles Chiang is R&D Director of the Advanced Technology Group at Synopsys Inc. in Mountain View, CA, USA

Table of Contents

Random Defects.- Systematic Yield - Lithography.- Systematic Yield - Chemical Mechanical Polishing (CMP).- Variability & Parametric Yield.- Design for Yield.- Yield Prediction.- Conclusions.