Encapsulation Technologies for Electronic Applications

Encapsulation Technologies for Electronic Applications

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Product Details

ISBN-13: 9780128119792
Publisher: Elsevier Science
Publication date: 10/23/2018
Series: Materials and Processes for Electronic Applications
Sold by: Barnes & Noble
Format: NOOK Book
Pages: 508
File size: 67 MB
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About the Author

Dr. Haleh Ardebili has a BS honors degree in Engineering Science and Mechanics from Pennsylvania State University at University Park, MS degree in Mechanical Engineering from Johns Hopkins University and PhD degree in Mechanical Engineering from University of Maryland at College Park. She has three years of industry experience as research scientist at General Electric Global Research Center at Niskayuna, New York. She is a recipient of GE Invention Fulcrum of Progress Award. She has several years of experience teaching engineering courses at University of Houston. In Sep 2010, she joined as Assistant Professor in the Mechanical Engineering Department at University of Houston. Her research work is mainly focused on nanomaterials for Energy Storage and Electronics.
Jiawei Zhang has 10 years of experience working in the development and implementation of advanced packages. He is currently Staff Engineer at Qualcomm, San Diego. Previously, he served as Development Senior Staff Engineer at Broadcom Corporation responsible for IC package co-design flow (Die/Package/System). He is experienced in advanced package, FCBGA, MCM, and SiP. He has published over 30 external papers, including two which won best Conference Paper Awards (2012 IMAPS and 2014 SMTAI) He has been honored with one Broadcom Corporation Outstanding Technical Achievement Awards for design flow. He also served on the IWLPC Technical Committee from 2013 to 2015 and as the session Chair in 2013.
has his own consulting firm, AvanTeco, specializing in materials and processes for electronics. He holds a BS in Chemistry from Fordham University and a PhD in Chemistry from Princeton University, where he was a DuPont Senior Fellow. His areas of expertise include materials and processes for electronic applications, primarily for high reliability systems, hybrid microcircuits, printed wiring circuits, and other interconnect packaging technologies. He is an expert on polymeric materials including adhesives, coatings, encapsulants, insulation, reliability based on failure modes and mechanisms. Dr. Licari has had a forty-year career dedicated to the study and advancement of microelectronic materials and processes.

Notable achievements throughout this career include conducting the first studies on the reliability and use of die-attach adhesives for microcircuits, which he did in the mid-1970s through the early 1980s, making industry and the government aware of the degrading effects of trace amounts of ionic contaminants in epoxy resins. He conducted early exploratory development on the use of non-noble metal (Cu) thick-film conductor pastes for thick-film ceramic circuits. He carried out the first studies on the use of Parylene as a dielectric and passivation coating for MOS devices and as a particle immobilizer for hybrid microcircuits. He developed the first photo-definable thick-film conductor and resistor pastes that were the forerunners of DuPont’s Fodel process, for which he received a patent was granted in England. And he developed the first photocurable epoxy coating using cationic photoinitiation by employing a diazonium salt as the catalytic agent (U.S. 3205157) . The work was referenced as pioneering work in a review article by J.V. Crivello “The Discovery ad Development of Onium Salt Cationic Photoinitiators,” J. Polymer Chemistry (1999)

Read an Excerpt


By Haleh Ardebili Michael G. Pecht

William Andrew

Copyright © 2009 Elsevier Inc.
All right reserved.

ISBN: 978-0-8155-1970-6

Chapter One


Electronics are used in a wide range of applications including computing, communications, biomedical, automotive, military, and aerospace. They must operate in varying temperature and humidity environments ranging from indoor controlled conditions to outdoor climate changes. Exposure to moisture, ionic contaminants, heat, radiation, and mechanical stresses can be highly detrimental to electronic devices and may lead to device failures. Therefore, it is essential that the electronic devices be packaged for protection from their intended environment, as well as to provide handling, assembly, and electrical and thermal considerations.

Electronic packaging may involve either hermetic (ceramic or metallic) packaging or non-hermetic (plastic) encapsulation. Currently, more than 99% of microelectronic devices are plastic encapsulated. Improvements in encapsulant materials and cost incentives have stretched the application boundaries for plastic electronic packages. Many electronic applications that traditionally used hermetic packages such as military are now using commercial off-the-shelf (COTS) plastic packages. Plastic encapsulation has the advantages of low cost, availability, and manufacturability.

Much of the focus is aimed at the research and development of new and improved encapsulants. With recent trends in environmental awareness, new environmentally friendly or "green" encapsulant materials (i.e., without brominated additives) have emerged. Plastic packages are also being considered for use in extreme high and low temperature electronics. 3D packaging and wafer-level packaging require unique encapsulation techniques. Encapsulants also play a role in emerging technologies. Modified existing or newly developed encapsulant materials are being developed for microelectromechanical systems (MEMS), bio-MEMS, bioelectronics, nanoelectronics, solar modules, and organic light-emitting diodes. Nanocomposite encapsulants with improved material properties are also being explored.

In this chapter, a historical overview of encapsulation is provided. Electronic packaging including package levels, encapsulated microelectronic devices, hermetic packages, and encapsulation methods and materials are discussed. Microelectronic packages including both 2D and 3D packages are described. Finally, a comparison of hermetic versus plastic packages is presented.

1.1 Historical Overview

Electronic devices have been packaged in a variety of ways. Among the first package types was a preformed package made of Kovar (an alloy of nickel, cobalt, manganese, and iron). Kovar, a trade name of Westinghouse Electric and Manufacturing Company, and invented by Howard Scott in 1936, has the advantage of a coefficient of thermal expansion (CTE) similar to that of glass. It is a suitable choice for sealing to glass because of lower CTE mismatch stresses.

One of the early transistor packages is shown in Fig. 1.1. In this package, the emitter, collector, and base connector leads were inserted through a glass bushing positioned in a Kovar ring or cylindrical housing. The bushing was made of a suitable electrical insulating and moisture impervious (hermetic) glass material. The transistor device was then bonded to the base lead and interconnected to the emitter and collector leads using wires. The Kovar disc covers were later hermetically sealed by welding. Ceramic packages, similar in construction to the Kovar casing, appeared later as less expensive alternatives.

The first plastic-encapsulated packages appeared on the market in the early 1950s. By the early 1960s, plastic encapsulation emerged as an inexpensive, simple alternative to both ceramic and metal encasings, and during the 1970s, virtually all high-volume integrated circuits (ICs) were encapsulated in plastic. By 1993, plastic-encapsulated microelectronics accounted for over 97% of the worldwide microcircuit production.

Most early microelectronic devices were compression molded where the molding compound is heated and compressed inside the mold. Potting soon emerged as a suitable alternative. Potting involved positioning the electrical circuit in a container and pouring the liquid encapsulant into the cavity. Figure 1.2 shows a typical transistor encapsulated using the "can and header" method. The transistor chip was soldered to a carrier which was then attached to the header assembly. The header assembly consisted of three parallel conductive lead-posts sealed into a button-like header made of pre-molded plastic encapsulant material such as a phenolic. The header served as a support for maintaining the relative positioning of the three posts. The microelectronic chip was electrically connected to the side lead posts via wire bonding. The assembly of lead-posts and carrier was then encapsulated with commercially available plastic encapsulant materials such as Dow Chemical Company's epoxy encapsulants.

Transfer molding gained worldwide acceptance as an economical method best suited for mass production. In transfer molding, the microelectronic chips are loaded into a multi-cavity mold and constrained, and the encapsulant is transferred from a reservoir into the cavity under heat and pressure. The encapsulant, typically a thermosetting polymer, is cured in the cavity to form the final electronic package. In transfer molding, unlike compression molding, no additional pressure is applied during heating and curing of the encapsulant. Furthermore, the closed mold design in transfer molding allows for more intricate chips to be encapsulated with better tolerances compared to compression molding.

Figure 1.3 shows one of the first molds used for transfer molding of a transistor device. The metal lead-posts were gripped and firmly held in proper position as the multi-part lower portion of the mold was clamped together. The leads were bent and flattened on top, and the semiconductor device was placed on one flattened lead and wire bonded to the other two leads. A thin mask was placed on top with a disc-shaped exposed area, and the chip and the leads were passivated with metallic oxide such as alumina. The mask was removed and the upper portion of the mold was then pressed on the lower portion. Powdered plastic or preforms were introduced through the cylindrical runner and became molten due to the high temperature of the upper mold portion. A piston was then pressed into the runner transferring the molten plastic through the gate into the cavity above the semiconductor device assembly. The plastic cured and solidified in the cavity. The mold opened to release the plastic molded parts. One of the disadvantages of this method was that the thin wire bonds were frequently damaged due to the high pressure and velocities of the encapsulant.

A novel approach to the problem of wire damage during transfer molding was to use a bottom-side gated process, in which the molding compound entered the cavity from the side opposite to the bond wires and in a motion path parallel to the wires (Fig. 1.4), thereby reducing the chances of breaking the delicate wires.

Although epoxy novolac was the first material used for plastic encapsulation, phenolics and silicones were the dominant plastics of the 1960s. At that time, plastic packages were plagued by numerous reliability problems due largely to the poor quality of the encapsulation system. Moisture-induced failure mechanisms, such as corrosion, cracking, and interfacial delamination, were significant. At that time, plastic packages encountered formidable challenges in gaining acceptance for use in government and military applications. While plastic packaging offered an economically viable alternative, the military continued using metal and ceramic packages due to higher reliability, ruggedness, and traceability.

Over the years, with improvements in encapsulant materials, die passivation, metallization technology, and assembly automation, plastics have dominated the electronic packaging industry. The reliability of plastic packages was no longer considered a stumbling block to their widespread application. In 1994, after the so-called "Perry Memo" (named after then Defense Secretary William Perry), the US military officially started the wider use of plastic-encapsulated electronic packages. The main driving force for this transition was cost. A hermetically packaged ceramic IC can cost up to ten times more than a plastic-packaged IC—if a suitable one is even available on the market at all. Not surprisingly, COTS technology plastic packages are now widely used in aerospace and military applications.

In the 2000s, with major advantages in cost, size, weight, performance, and availability, plastic packages attracted more than 99% of the market share of worldwide microcircuit sales. Ceramic packages are used only in harsh military applications and specialized low-volume, high-performance systems. Much of the electronics packaging research performed today involves developing new smaller, lighter, cheaper, and more reliable plastic packages. Plastic-encapsulated microcircuits will continue to account for the vast share of the ICs market in coming years, but hermetic packages, with their special characteristics, will continue to have a unique market in the electronics industry.

Over the decades numerous formulations of epoxies have been developed with lower curing shrinkages and contamination levels. Since the early 1970s, epoxies have taken over as the main encapsulating material. Although silicones are still sometimes used, in the 2000s the typical encapsulant is an epoxy resin matrix with a complex mixture of cross linkers, accelerators, flame retardants, fillers, coupling agents, mold-release agents, and flexibilizers.

Plastic packages can be pre-molded or post-molded. In the pre-molding process, a package base is prepared from a pre-molded plastic (or sometimes a metal substrate). The chip is then placed on the base and connected to an I/O fan out pattern with wire. A pre-molded plastic lid or housing is attached on top, using an epoxy adhesive to protect the die and wire bonds, and forms a cavity inside the package. Figure 1.5 shows a pre-molded package. Pre-molded packages are most often used for high-pin-count devices or pin-grid arrays that are not amenable to flat lead-frames and simple fan out patterns.

In the post-molded package, the die is first attached to a lead-frame and connected to an I/O fan out pattern with wire, which is then loaded into a multi-cavity molding tool and encapsulated in a thermoset molding compound via the transfer molding process. Post-molded packages are less expensive than pre-molded ones because there are fewer parts and assembly steps. About 90% of plastic packages are made using postmolding techniques.

1.2 Electronic Packaging

The main objectives of electronic packaging are (a) the protection of the IC chip (or die) and (b) the interconnection of IC chips to other electronic components (i.e., IC chips, printed circuit boards (PCBs), transformers, and connectors) for transfer of electrical signals. An electronic package may be designed to

• reduce or remove heat that is either generated internally during device operation or due to the external environment;

• provide resistance to humidity and moisture;

• provide resistance to ionic contaminants;

• protect from radiation;

• reduce thermo-mechanical stresses; and

• provide mechanical support.

Electronic packaging generally begins at the chip or wafer level. Figure 1.6 shows a flowchart of a conventional plastic packaging of an IC chip. The passivated silicon die is cut out from the wafer using a diamond blade. The passivation layer is deposited by plasma-enhanced chemical vapor deposition, or by a spin-on technique for polyimides. The silicon chip is then attached to the lead-frame die-paddle using an electrically conductive or electrically insulative polymeric adhesive such as epoxy or polyimide. In some cases, metal and glass die-attachments are used for microcircuits or power devices that dissipate large amounts of heat or for high-reliability space applications where low outgassing is a requirement. Metal or glass attachment materials, however, are more brittle, more costly, and require higher processing temperatures than polymer adhesives.

The lead-frame, which consists of a die-adhesive-paddle and leads, is fabricated by either stamping or etching process. Stamping is more cost effective than etching, but it is limited to two hundred pins or fewer. The lead-frame is usually plated with silver, a tin-lead solder, or nickel-palladium before encapsulation to improve the adhesion of the bond wires.

After the attachment to the die-paddle, the chip is wire bonded to the leads for electrical connection. The bond wires are usually thermosonically bonded (ball-bonded) to the aluminum bonding pads on the chips and ultrasonically bonded (wedge-bonded) to the fingers of the lead-frame.


Excerpted from ENCAPSULATION TECHNOLOGIES FOR ELECTRONIC APPLICATIONS by Haleh Ardebili Michael G. Pecht Copyright © 2009 by Elsevier Inc.. Excerpted by permission of William Andrew. All rights reserved. No part of this excerpt may be reproduced or reprinted without permission in writing from the publisher.
Excerpts are provided by Dial-A-Book Inc. solely for the personal use of visitors to this web site.

Table of Contents

1. Introduction
2. Plastic Encapsulant Materials
3. Encapsulation Process Technology
4. Characterization of Encapsulant Properties
5. Encapsulation Defects and Failures
6. Defect and Failure Analysis Techniques for Encapsulated Microelectronics
7. Qualification and Quality Assurance
8. Trends and Challenges

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