In structuring this book, the author’s hope was to provide interesting reading for a broad range of design automation readers. The first two chapters provide an overview of digital systems design and, in particular, verification. Chapter 3 reviews mainstream symbolic techniques in formal verification, dedicating most of its focus to symbolic simulation. The fourth chapter covers the necessary principles of parametric forms and disjoint-support decompositions. Chapters 5 and 6 focus on recent symbolic simulation techniques, and the final chapter addresses key topics needing further research.
Scalable Hardware Verification with Symbolic Simulation is for verification engineers and researchers in the design automation field.
Highlights:
• A discussion of the leading hardware verification techniques, including simulation and formal verification solutions
• Important concepts related to the underlying models and algorithms employed in the field
• The latest innovations in the area of symbolic simulation, exploiting techniques such as parametric forms and decomposition properties of Booleanfunctions
• Providing insights into possible new developments in the hardware verification
In structuring this book, the author’s hope was to provide interesting reading for a broad range of design automation readers. The first two chapters provide an overview of digital systems design and, in particular, verification. Chapter 3 reviews mainstream symbolic techniques in formal verification, dedicating most of its focus to symbolic simulation. The fourth chapter covers the necessary principles of parametric forms and disjoint-support decompositions. Chapters 5 and 6 focus on recent symbolic simulation techniques, and the final chapter addresses key topics needing further research.
Scalable Hardware Verification with Symbolic Simulation is for verification engineers and researchers in the design automation field.
Highlights:
• A discussion of the leading hardware verification techniques, including simulation and formal verification solutions
• Important concepts related to the underlying models and algorithms employed in the field
• The latest innovations in the area of symbolic simulation, exploiting techniques such as parametric forms and decomposition properties of Booleanfunctions
• Providing insights into possible new developments in the hardware verification
Scalable Hardware Verification with Symbolic Simulation
180Scalable Hardware Verification with Symbolic Simulation
180Product Details
ISBN-13: | 9780387244112 |
---|---|
Publisher: | Springer US |
Publication date: | 12/21/2005 |
Edition description: | 2006 |
Pages: | 180 |
Product dimensions: | 6.10(w) x 9.25(h) x 0.02(d) |