Spacer Engineered FinFET Architectures: High-Performance Digital Circuit Applications

by Sudeb Dasgupta, Brajesh Kumar Kaushik, Pankaj Kumar Pal

Overview

This book focusses on the spacer engineering aspects of novel MOS-based device–circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.

Product Details

ISBN-13:	9780367573553
Publisher:	CRC Press
Publication date:	06/30/2020
Pages:	154
Product dimensions:	6.12(w) x 9.19(h) x (d)

About the Author

Sudeb Dasgupta, Brajesh Kumar Kaushik, Pankaj Kumar Pal

Table of Contents

Preface

About the Authors

 

Chapter 1 ◾ Introduction to Nanoelectronics

Chapter 2 ◾ Tri-Gate FinFET Technology and Its Advancement

Chapter 3 ◾ Dual-k Spacer Device Architecture and Its Electrostatics

Chapter 4 ◾ Capacitive Analysis and Dual-k FinFET-Based Digital Circuit Design

Chapter 5 ◾ Design Metric Improvement of a Dual-k–Based SRAM Cell

Chapter 6 ◾ Statistical Variability and Sensitivity Analysis

 

INDEX