Successful ASIC Design the First Time Through

Successful ASIC Design the First Time Through

by John Huber

Paperback(Softcover reprint of the original 1st ed. 1991)

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Product Details

ISBN-13: 9781468478877
Publisher: Springer US
Publication date: 11/16/2012
Edition description: Softcover reprint of the original 1st ed. 1991
Pages: 200
Product dimensions: 5.98(w) x 9.02(h) x 0.02(d)

Table of Contents

1. Introduction to ASICs and ASIC Design.- Doesn’t Everybody Design with ASICs?.- How Many ASIC Vendors Are Needed to Build an ASIC?.- Types of ASICs.- The Benefits of Using ASICs.- When Should a Designer Consider Using an ASIC?.- ASIC Types: Advantages and Disadvantages.- When to Use a PGA, FPGA, or Standard ASIC.- ASIC Technologies and Trade-offs.- Market Statistics and Predictions about ASICs.- Summary and Conclusions.- 2. The ASIC Design Process.- ASIC Design Process Flow.- Concept and Specifications: Where it All Begins.- The Foundry/Customer Interface.- Design Implementation.- Choosing an ASIC Vendor.- ASIC Design Kits.- ASIC Vendor Guidelines, Assistance, and Support.- Design In-house, Rent, or Use the ASIC Vendor Design Center?.- Postdesign Activities: Backannotation for Simulation.- Summary and Conclusions.- 3. Design Creation for ASICs.- System on a Chip.- Start the Design at the Architectural Level, From the Top.- Behavioral-level Design.- Functional Design.- Structural Design.- Detailed Design.- Physical/Geometry.- “Standard” Electronic Design Automation and Schematic Capture.- Specific Design Considerations.- Silicon Compilers and ASIC Design.- ERC and DRC Considerations.- ASIC and EDA Vendor Design Rule Checks.- Knowing When the Design Is Ready for Verification.- Summary and Conclusions.- 4. Design Methodologies for ASICs.- Bottom-up Design.- Top-down Design.- Conceptual-to-Functional Design.- Design Synthesis.- Logic Synthesis.- Silicon Compilers.- Should the Designer Lay It Out?.- Summary and Conclusions.- 5. Logic Simulation.- What Is Simulation?.- The Imperative for ASIC Simulation.- The Components of Logic Simulation.- Initialization and Unknowns.- Simulation States.- Approximations and Limitations.- Selecting the Computer Power.- Tricks of the Trade.- Acceleration Techniques.- Developing a Successful Simulation Strategy.- Top Ten Most Common Mistakes.- Consider Test Now.- Board-Level Simulation.- Summary.- 6. Timing.- The Importance of Timing.- Basic Timing Considerations.- Timing and Logic Simulation.- Hazards.- Specialized Timing Analyzers.- Board- and System-Level Timing.- Summary.- 7. Fault Simulation.- What Is Fault Simulation?.- Uses of Fault Simulation.- Fault Simulation in the Design Process.- Fault Simulation Basics.- Inputs to the Fault Simulator.- Outputs from the Fault Simulator.- What Is a Good Fault Coverage?.- Acceleration Techniques.- Commonly Asked Questions.- Some Straight Talk about Fault Simulation.- Contractual or Government Requirements.- Limitations of Fault Simulation.- Summary.- 8. Test.- A Story—Part 1.- A Story—Part 2.- A Story—Epilogue.- The Moral of Our Story.- Test and ASIC Design.- DC Test Methodology.- Design for Testability.- Emerging Test Technologies.- Power Analysis.- Board Test.- Summary.- 9. Summary and Conclusions.- What You Have (or Should Have) Learned—A Review.- When to Use the ASIC Vendor’s Design Tools and When to Buy Your Own.- How to Choose an EDA Vendor.- Long-Term Viability of ASIC Methodology for Board-System Design.- Future of EDA Tools and Methods.- Board and System Simulation.- The Future of Mixed Analog-Digital ASICs.

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