Technician's Guide to the 68HC11 Microcontroller / Edition 1

Technician's Guide to the 68HC11 Microcontroller / Edition 1

by Dan Black
ISBN-10:
0766817156
ISBN-13:
2900766817158
Pub. Date:
10/05/2000
Publisher:
Cengage Learning
Technician's Guide to the 68HC11 Microcontroller / Edition 1

Technician's Guide to the 68HC11 Microcontroller / Edition 1

by Dan Black
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Overview

Technician's Guide to the 68HC11 Microcontroller is ideal for readers with little or no prior programming experience who want to master the basics of troubleshooting and programming Motorola's 68HC11 microcontroller. Both hardware and software are covered in detail to provide a complete understanding of the principles underlying how a microcontroller works. Theory is supplemented by examples designed to illustrate how concepts may be applied. By learning how to program the 68HC11 at an elementary level, readers also gain valuable experience using manufacturer-specific documentation that prepares them for work with other more sophisticated microcontrollers.

Product Details

ISBN-13: 2900766817158
Publisher: Cengage Learning
Publication date: 10/05/2000
Edition description: New Edition
Pages: 408
Product dimensions: 6.00(w) x 1.25(h) x 9.00(d)

About the Author

Mr. Chartrand holds a Bachelor of Science degree in electrical engineering from Queen's university in Kingston Ontario. He has been teaching digital courses for 20 years at Niagara College in Welland , Ontario. Mr. Chartrand has made industry contributions with various designs including interfacing an infrared camera to a PC, creating a digital circuit board used as a PC training system, and designing a control pendant for an air-filled medical bed. He also worked as a plant engineer for General Motors.

Table of Contents

1 Introduction To Computer Hardware: Objectives, Outline, 1.1 Introduction, 1.2 Elements Of Every Computer, 68HC11 Hardware Block Diagram, Central Processor, Memory, Input/Output,
Busses, Self Test Questions 1.2. 1.3 Processors, Arithmetic Logic Unit, Processor Registers,
Control Block, HC11 Processor, Condition Code Register Bits, HC11 Processor Modes, Self Test Questions 1.3. 1.4 Memory, RAM, ROM, HC11 Memory, Self Test Questions 1.4. 1.5 I/O, I/O on the HC11, Self Test Questions 1.5. 1.6 EVBU / BUFFALO, Self Test Questions 1.6. 1.7 Using the EVBU. 1.8 Summary. 1.9 Questions. 1.10 Problems. 1.11 Lab Exercises. 2 Introduction To Computer Software: Objectives, Outline, 2.1 Introduction. 2.2 Programming the Computer, Source Code, Machine Code, HC11 Machine Code, Self Test Questions 2.2. 2.3 Memory Addressing Modes, Methods of Addressing Memory, Implied / Inherent, Immediate, Absolute, Indexed,
Relative, Self Test Questions 2.3. 2.4 HC11 Addressing Modes, Inherent (INH), Immediate (IMM),
Extended (EXT), Direct (DIR), Indexed (INDX, INDY), Relative (REL), Self Test Questions 2.4. 2.5 Processing Instructions, Fetch Cycles, Execute Cycles, 8-bit Versus 16-bit Memory Access, Self Test Questions 2.5. 2.6 Program Flow. Example 2.1, Example 2.2, Self Test Questions 2.6. 2.7 Summary. 2.8 Questions. 2.9 Problems. 2.10 Lab Exercises. 3 HC11 Programming: Objectives,
Outline, 3.1 Introduction. 3.2 Data Movement Instructions, Data Loading Instructions, Data Storing Instructions, Clear Instructions, Transfer Instructions, Exchange Instructions, Self Test Questions 3.2. 3.3 Arithmetic & Logic Instructions, Addition Instructions, Subtraction Instructions, Increment Instructions, Decrement Instructions, Logic Instructions, Shift Instructions, Rotate Instructions,
Multiply & Divide Instructions, Self Test Questions 3.3. 3.4 Bit Level Operations, Data Masking,
Bit Manipulation, Bit Level Comparison, Bit Level Conditional Branching, Self Test Questions 3.5.
3.5 Special Instructions, Subroutine Control, Interrupt Control, Processor Control, Status Flag Manipulation, Self Test Questions 3.6. 3.6 Summary. 3.7 Questions. 3.8 Problems. 4 Branching & Loops: Objectives, Outline, 4.1 Introduction. 4.2 Program Flow Altering Instructions, Unconditional Transfer of Control, Conditional Transfer Of Control, Compare Instructions, Self Test Questions 3.4. 4.3 Infinite Program Loops, Self Test Questions 4.2. 4.4 Finite Program Loops, Self Test Questions 4.3. 4.5 Conditional Transfer Of Control, Conditional-Simple Branch Instructions,
Conditional-Unsigned Branch Instructions, Conditional-Signed Branch Instructions, Self Test Questions 4.4. 4.6 Summary. 4.7 Questions. 5 Indexing Through Memory: Objectives, Outline, 5.1 Introduction. 5.2 Using The Indexed Addressing Mode. 5.3 Summary. 5.4 Questions. 5.5 Problems. 6 Subroutines: Objectives, Outline, 6.1 Introduction. 6.2 Stack & Stack Pointer, Self Test Questions 6.2. 6.3 Subroutines, Example 6.1. Example 6.2. Example 6.3. Self Test Questions 6.3. 6.4 Nested Subroutines, Example 6.4. Example 6.5. Self Test Questions 6.4. 6.5 BUFFALO Subroutines, Self Test Questions 6.5. 6.6 Summary. 6.7 Problems. 7 Working With An Assembler:
Objectives, Outline, 7.1 Introduction To Assemblers. 7.2 Writing Source Code, Self Test Questions 7.2. 7.3 Assembler Functions, Self Test Questions 7.3. 7.4 Listing Files, Self Test Questions 7.4. 7.5 "S" Records, Self Test Questions 7.5. 7.6 Summary. 7.7 Questions. 8 Memory Systems: Objectives, Outline, 8.1 Introduction. 8.2 Address Decoding. Self Test Questions 8.2. 8.3 On-chip Memory, Self Test Questions 8.3. 8.4 RAM, Self Test Questions 8.4.
8.5 EEPROM, Self Test Questions 8.5. 8.6 ROM, Self Test Questions 8.6. 8.7 System Registers,
Self Test Questions 8.7. 8.8 Memory Expansion, Self Test Questions 8.8. 8.9 Booting from EEPROM, Self Test Questions 8.9. 8.10 Summary. 8.11 Questions / Problems. 9 68HC11 Interrupts & Reset: Objectives, Outline, 9.1 Introduction. 9.2 Servicing an Interrupt, Complete the Current Instruction, Stack Processor Registers, Load the Interrupt Vector, Execute the Instructions of the Interrupt Service Routine, Return From Interrupt and Unstack the Registers,
Using Interrupts with BUFFALO, Local versus Global Control, Self Test Questions 9.2. 9.3 Maskable Interrupts, External Interrupts using IRQ, Maskable Interrupt Priority, Self Test Questions 9.3. 9.4 Non-Maskable Interrupts, External Interrupts using XIRQ, Software Interrupt (SWI),Illegal Opcode Fetch, Computer Operating Properly (COP) Failure, Clock Monitor Failure, Power On Reset (POR), Non-maskable Interrupt Priority, Self Test Questions 9.4. 9.5 Interrupt Application,
Example 9.1, Example 9.2, Self Test Questions 9.5. 9.6 Resets, Causes of Reset, Self Test Questions 9.6. 9.7 Servicing a Reset Interrupt, Stop Execution of Current Instruction, Initial Hardware Conditions, Load System Configuration from CONFIG Register, Establish the Mode of Operation, Load the Reset Vector, Self Test Questions 9.7. 9.8 Summary. 9.9 Questions & Problems. 10 General Purpose I/O: Objectives, Outline, 10.1 Introduction, 10.2 Port B - Output Only, Self Test Questions 10.2. 10.3 Port C - Programmable I/O, Self Test Questions 10.3. 10.4 I/O with Handshaking, Self Test Questions 10.4. 10.5 General-Purpose I/O On Other Ports, PORTA, PORTD, PORTE, Self Test Questions 10.5. 10.6 Summary. 10.7 Questions. 11 Analog Capture - Port E: Objectives, Key Terms, Outline 11.1 Introduction, HC11 PORTE Pin Assignments,
11.2 Theory of Analog Conversion, Range, Steps, Resolution, Self Test Questions 11.2. 11.3 A/D Hardware, Analog Input Multiplexer, Analog Converter, Digital Control, Result Registers,
Hardware Connections, Self Test Questions 11.3. 11.4 A/D Function, Example 11.1, Example 11.2, Conversion Sequence & Timing, Self Test Questions 11.4. 11.5 Example using an LM34/35 Temperature Sensor, Self Test Questions 11.5. 11.6 Summary, 11.7 Question & Problems. 12 Timed Events - Port A: Objectives, Outline, 12.1 Introduction, Self Test Questions 12.1. 12.2 Theory of Timed Events, Self Test Questions 12.2. 12.3 Main Timer Functions, Clearing Timer Flags, Relationship of Flag Bits and Interrupt Enable Bits, Self Test Questions 12.3. 12.4 Input-capture, Uniqueness of the IC4 Function, Input-capture Registers, Input Edge Detection Logic, Interrupt Generation Logic, Input-capture Application, Self Test Questions 12.4. 12.5 Output Compare, Uniqueness of OC5, Output Compare Registers, Dedicated Comparators,
Interrupt Generation Logic, OC1 Function, Forced State of OC1 Through OC5, Output Compare Application, Self Test Questions 12.5. 12.6 Pulse Accumulator, Pulse Accumulator Count Register
Pulse Accumulator Enable and mode Select, Event Counting Mode, Gated Time Accumulation Mode, Interrupt Generation Logic, Self Test Questions 12.6. 12.7 Real Time Interrupts, Self Test Questions 12.7. 12.8 Summary, 12.9 Questions & Problems. 13 Serial Communication - Port D:
Objectives, Outline, 13.1 Introduction, 13.2 Serial Communications Interface, Self Test Questions 13.2. 13.3 Serial Peripheral Interface (SPI), Self Test Questions 13.3. 13.4 Summary, 13.5 Problems. 14 C Programming and the HC11: Objectives, Outline, 14.1 Introduction, 14.2 C Programming, Self Test Questions 14.2. 14.3 Data Types, Self Test Questions 14.3. 14.4 Operators, Self Test Questions 14.5. 14.5 Variables, Assignment, Self Test Questions 14.5.
14.6 Special Statements, Self Test Questions 14.6. 14.7 Subroutines, Self Test Questions 14.7.
14.8 Examples, 14.9 Summary, 14.10 Problems.
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