The Verilog® Hardware Description Language
XV From the Old to the New xvii Acknowledgments xx| Verilog A Tutorial Introduction Getting Started 2 A Structural Description 2 Simulating the binaryToESeg Driver 4 Creating Ports For the Module 7 Creating a Testbench For a Module 8 Behavioral Modeling of Combinational Circuits 11 Procedural Models 12 Rules for Synthesizing Combinational Circuits 13 Procedural Modeling of Clocked Sequential Circuits 14 Modeling Finite State Machines 15 Rules for Synthesizing Sequential Systems 18 Non-Blocking Assignment ("
1139992918
The Verilog® Hardware Description Language
XV From the Old to the New xvii Acknowledgments xx| Verilog A Tutorial Introduction Getting Started 2 A Structural Description 2 Simulating the binaryToESeg Driver 4 Creating Ports For the Module 7 Creating a Testbench For a Module 8 Behavioral Modeling of Combinational Circuits 11 Procedural Models 12 Rules for Synthesizing Combinational Circuits 13 Procedural Modeling of Clocked Sequential Circuits 14 Modeling Finite State Machines 15 Rules for Synthesizing Sequential Systems 18 Non-Blocking Assignment ("
84.99
In Stock
5
1
The Verilog® Hardware Description Language
386
The Verilog® Hardware Description Language
386Paperback(5th ed. 2002)
$84.99
84.99
In Stock
Product Details
| ISBN-13: | 9780387849300 |
|---|---|
| Publisher: | Springer US |
| Publication date: | 10/08/2008 |
| Edition description: | 5th ed. 2002 |
| Pages: | 386 |
| Product dimensions: | 6.00(w) x 9.10(h) x 0.90(d) |
From the B&N Reads Blog