The Verilog PLI Handbook: A User's Guide and Comprehensive Reference on the Verilog Programming Language Interface

by Stuart Sutherland

Overview

The Verilog Programming Language Interface is a powerful feature of the Verilog standard. Through this interface, a Verilog simulator can be customized to perform virtually any engineering task desired, such as adding custom design debug utilities, adding proprietary file read/write utilities, and interfacing bus functional C language models to a simulator.
This book serves as both a user's guide for learning the Verilog PLI, and as a comprehensive reference manual on the Verilog PLI standard. Both the TF/ACC ("PLI 1.0") and the VPI ("PLI 2.0") generations of the PLI are presented, based on the IEEE 1364 Verilog standard. The second edition of this book adds detailed coverage of the many enhancements added in the latest IEEE 1364-2001 Verilog standard ("Verilog-2001").

Product Details

ISBN-13:	9781475783711
Publisher:	Springer US
Publication date:	04/18/2013
Series:	The Springer International Series in Engineering and Computer Science , #666
Edition description:	Softcover reprint of the original 2nd ed. 2002
Pages:	784
Product dimensions:	6.10(w) x 9.25(h) x 0.06(d)

About the Author

Mr. Stuart Sutherland is a member of the IEEE Verilog standards committee, where he is co-chair of the PLI standards task force and technical editor for the PLI sections of the IEEE 1364 Verilog Language Reference Manual.

Mr. Sutherland has more than 14 years of experience in hardware design and over ten years of experience with Verilog. He is the founder of Sutherland HDL Inc., located in Portland Oregon. Sutherland HDL provides expert Verilog HDL and Verilog PLI design services, including training, modeling, design verification and software tool evaluation. Verilog training is one of the specialties of Sutherland HDL. Prior to founding Sutherland HDL in 1992, Mr. Sutherland was as an engineer at Sanders Display Products Division in New Hampshire, where he worked on high speed graphics systems for the defense industry. In 1988, he became a senior applications engineer for Gateway Design Automation, the founding company of Verilog. AtGateway, which was acquired by Cadence Design Systems in 1989, Mr. Sutherland specialized in training and support for logic simulation, timing analysis, fault simulation, and the Verilog PLI. Mr. Sutherland has also worked closely with several EDA vendors to specify, test and bring to market Verilog simulation products.

Mr. Sutherland holds a Bachelor of Science in Computer Science, with an emphasis in Electronic Engineering Technology, from Weber State University (Ogden, Utah) and Franklin Pierce College (Nashua, New Hampshire). He has taught Verilog engineering courses at the University of California, Santa Cruz (Santa Clara extension), and has authored the popular "Verilog HDL Quick Reference Guide" and "Verilog PU Quick Reference Guide". He has presented tutorials and papers at the International Verilog Conference and at the International Cadence User's Group Conference, and has won awards for best speaker and best tutorial.

Table of Contents

Dedication. About the Author. List of Examples. Foreword. Acknowledgments. Introduction. Part One: The VPI Portion of the Verilog PLI Standard. 1. Creating PLI Applications Using VPI Routines. 2. Interfacing VPI Applications to Verilog Simulators. 3. How to Use the VPI Routines. 4. Details about the VPI Routine Library. 5. Reading and Modifying Values Using VPI Routines. 6. Synchronizing to Simulations Using VPI Callbacks. 7. Interfacing to C Models Using VPI Routines. Part Two: The TF/ACC Portion of the Verilog PLI Standard. 8. Creating PLI Applications Using TF and ACC Routines. 9. Interfacing TF/ACC Applications to Verilog Simulators. 10. How to Use the TF Routines. 11. Reading and Writing Values Using TF Routines. 12. Synchronizing to Simulations Using Misctf Routines. 13. Interfacing to C Models Using TF Routines. 14. How to Use the ACC Routines. 15. Details on the ACC Routine Library. 16. Reading and Modifying Values Using ACC Routines. 17. Using the Value Change Link (VCL). 18. Interfacing to C Models Using ACC Routines. Appendices. Appendix A: Linking PLI Applications to Verilog Simulators. Appendix B: The IEEE 1364-2001 TF Routine Library. Appendix C: The IEEE 1364-2001 ACC Routine Library. Appendix D: The IEEE 1364-2001 VPI Routine Library. Index. About the CD.

Editorial Reviews

"The Verilog PLI Handbook is the best book written about the PLI. Use it once, and it will pay for itself by saving you a great deal of time. The book brings clarity to the Verilog Programming Language Interface. The descriptions and extensive examples shed new light on the many dark corners of the PLI. Stuart Sutherland has produced the definitive guide, covering all versions and uses for the PLI. I recommend this book to all Verilog users who want to learn about the PLI."
(Chris Spear, Verification Consultant, Synopsys, Inc.)

From the Publisher