Title: CTL for Test Information of Digital ICs, Author: Rohit Kapur
Title: Optimized ASIP Synthesis from Architecture Description Language Models, Author: Oliver Schliebusch
Title: High-Level System Modeling: Specification Languages, Author: Jean-Michel Bergé
Title: Fundamentals and Standards in Hardware Description Languages, Author: Jean Mermet
Title: Architecture Exploration for Embedded Processors with LISA, Author: Andreas Hoffmann
Title: Optimized ASIP Synthesis from Architecture Description Language Models, Author: Oliver Schliebusch
Title: Electronic Chips & Systems Design Languages, Author: Jean Mermet
Title: Higher-Level Hardware Synthesis, Author: Richard Sharp
Title: High-Level System Modeling: Specification Languages, Author: Jean-Michel Bergé

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